lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240506-pygmy-wolf-of-advance-afb194-mkl@pengutronix.de>
Date: Mon, 6 May 2024 11:43:03 +0200
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Gregor Herburger <gregor.herburger@...tq-group.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>, 
	Thomas Kopp <thomas.kopp@...rochip.com>, Vincent Mailhol <mailhol.vincent@...adoo.fr>, 
	"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, 
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, linux-can@...r.kernel.org, 
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, 
	linux@...tq-group.com
Subject: Re: [PATCH v2 5/6] can: mcp251xfd: add gpio functionality

On 06.05.2024 07:59:47, Gregor Herburger wrote:
> The mcp251xfd devices allow two pins to be configured as gpio. Add this
> functionality to driver.
> 
> Signed-off-by: Gregor Herburger <gregor.herburger@...tq-group.com>
> ---
>  drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c | 173 +++++++++++++++++++++++++
>  drivers/net/can/spi/mcp251xfd/mcp251xfd.h      |   6 +
>  2 files changed, 179 insertions(+)
> 
> diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
> index 4739ad80ef2a..de301f3a2f4e 100644
> --- a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
> +++ b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
> @@ -16,6 +16,7 @@
>  #include <linux/bitfield.h>
>  #include <linux/clk.h>
>  #include <linux/device.h>
> +#include <linux/gpio/driver.h>
>  #include <linux/mod_devicetable.h>
>  #include <linux/module.h>
>  #include <linux/pm_runtime.h>
> @@ -1768,6 +1769,172 @@ static int mcp251xfd_register_check_rx_int(struct mcp251xfd_priv *priv)
>  	return 0;
>  }
>  
> +#ifdef CONFIG_GPIOLIB
> +static const char * const mcp251xfd_gpio_names[] = {"GPIO0", "GPIO1"};

please add spaces after { and before }.

> +
> +static int mcp251xfd_gpio_request(struct gpio_chip *chip, unsigned int offset)
> +{
> +	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
> +	u32 pin_mask = MCP251XFD_REG_IOCON_PM0 << offset;

Can you add MCP251XFD_REG_IOCON_PM(), MCP251XFD_REG_IOCON_TRIS(),
MCP251XFD_REG_IOCON_LAT(), MCP251XFD_REG_IOCON_GPIO() macros?

> +	int ret;
> +
> +	if (priv->rx_int && offset == 1) {
> +		netdev_err(priv->ndev, "Can't use GPIO 1 with RX-INT!\n");
> +		return -EINVAL;
> +	}
> +
> +	ret = pm_runtime_resume_and_get(priv->ndev->dev.parent);
> +	if (ret)
> +		return ret;
> +
> +	return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON,
> +				  pin_mask, pin_mask);
> +}
> +
> +static void mcp251xfd_gpio_free(struct gpio_chip *chip, unsigned int offset)
> +{
> +	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
> +
> +	pm_runtime_put(priv->ndev->dev.parent);
> +}
> +
> +static int mcp251xfd_gpio_get_direction(struct gpio_chip *chip,
> +					unsigned int offset)
> +{
> +	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
> +	u32 mask = MCP251XFD_REG_IOCON_TRIS0 << offset;
> +	u32 val;
> +
> +	regmap_read(priv->map_reg, MCP251XFD_REG_IOCON, &val);

Please print an error if regmap_read() throws an error.

> +
> +	if (mask & val)
> +		return GPIO_LINE_DIRECTION_IN;
> +
> +	return GPIO_LINE_DIRECTION_OUT;
> +}
> +
> +static int mcp251xfd_gpio_get(struct gpio_chip *chip, unsigned int offset)
> +{
> +	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
> +	u32 mask = MCP251XFD_REG_IOCON_GPIO0 << offset;
> +	u32 val;
> +
> +	regmap_read(priv->map_reg, MCP251XFD_REG_IOCON, &val);

same here

> +
> +	return !!(mask & val);
> +}
> +
> +static int mcp251xfd_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
> +				       unsigned long *bit)
> +{
> +	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
> +	u32 val;
> +	int ret;
> +
> +	ret = regmap_read(priv->map_reg, MCP251XFD_REG_IOCON, &val);
> +	if (ret)
> +		return ret;
> +
> +	*bit = FIELD_GET(MCP251XFD_REG_IOCON_GPIO_MASK, val) & *mask;
> +
> +	return 0;
> +}
> +
> +static int mcp251xfd_gpio_direction_output(struct gpio_chip *chip,
> +					   unsigned int offset, int value)
> +{
> +	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
> +	u32 dir_mask = MCP251XFD_REG_IOCON_TRIS0 << offset;
> +	u32 val_mask = MCP251XFD_REG_IOCON_LAT0 << offset;
> +	u32 val;
> +
> +	if (value)
> +		val = val_mask;
> +	else
> +		val = 0;
> +
> +	return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON,
> +				  dir_mask | val_mask, val);
> +}
> +
> +static int mcp251xfd_gpio_direction_input(struct gpio_chip *chip,
> +					  unsigned int offset)
> +{
> +	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
> +	u32 dir_mask = MCP251XFD_REG_IOCON_TRIS0 << offset;
> +
> +	return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON,
> +				  dir_mask, dir_mask);
> +}
> +
> +static void mcp251xfd_gpio_set(struct gpio_chip *chip, unsigned int offset,
> +			       int value)
> +{
> +	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
> +	u32 val_mask = MCP251XFD_REG_IOCON_LAT0 << offset;
> +	u32 val;
> +	int ret;
> +
> +	if (value)
> +		val = val_mask;
> +	else
> +		val = 0;
> +
> +	ret = regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON,
> +				 val_mask, val);
> +	if (ret)
> +		dev_warn(&priv->spi->dev,
> +			 "Failed to set GPIO %u: %d\n", offset, ret);

dev_error()

> +}
> +
> +static void mcp251xfd_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask,
> +					unsigned long *bits)
> +{
> +	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
> +	u32 val;
> +	int ret;
> +
> +	val = FIELD_PREP(MCP251XFD_REG_IOCON_LAT_MASK, *bits);
> +
> +	ret = regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON,
> +				 MCP251XFD_REG_IOCON_LAT_MASK, val);
> +	if (ret)
> +		dev_warn(&priv->spi->dev, "Failed to set GPIOs %d\n", ret);

dev_error()

regards,
Marc

-- 
Pengutronix e.K.                 | Marc Kleine-Budde          |
Embedded Linux                   | https://www.pengutronix.de |
Vertretung Nürnberg              | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-9   |

Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ