linux-kernel - Re: [PATCH v3 2/4] dt-bindings: mips: brcm: Document brcm,bmips-cbr-reg property

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Date: Wed, 8 May 2024 19:17:49 +0200
From: Christian Marangi <ansuelsmth@...il.com>
To: Conor Dooley <conor@...nel.org>
Cc: Hauke Mehrtens <hauke@...ke-m.de>,
	Rafał Miłecki <zajec5@...il.com>,
	Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Florian Fainelli <florian.fainelli@...adcom.com>,
	Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
	linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/4] dt-bindings: mips: brcm: Document
 brcm,bmips-cbr-reg property

On Wed, May 08, 2024 at 06:14:34PM +0100, Conor Dooley wrote:
> On Wed, May 08, 2024 at 07:07:18PM +0200, Christian Marangi wrote:
> > Document brcm,bmips-cbr-reg property.
> > 
> > Some SoC suffer from a BUG where read_c0_brcm_cbr() might return 0
> > if called from TP1. The CBR address is always the same on the SoC
> > hence it can be provided in DT to handle broken case where bootloader
> > doesn't init it or SMP where read_c0_brcm_cbr() returns 0 from TP1.
> > 
> > Usage of this property is to give an address also in these broken
> > configuration/bootloader.
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> > ---
> >  .../devicetree/bindings/mips/brcm/soc.yaml    | 23 +++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> > index 975945ca2888..77f73ab48c11 100644
> > --- a/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> > +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> > @@ -55,6 +55,15 @@ properties:
> >           under the "cpus" node.
> >          $ref: /schemas/types.yaml#/definitions/uint32
> >  
> > +      brcm,bmips-cbr-reg:
> > +        description: Reference address of the CBR.
> 
> Pretty sure that Rob commented last time that there's no definition
> anywhere here of CBR, but I don't see either a response to him or an
> explanation in v3 as to what CBR means.
>

Sorry I missed it.

> > +          Some SoC suffer from a BUG where read_c0_brcm_cbr() might
> > +          return 0 if called from TP1. The CBR address is always the
> > +          same on the SoC hence it can be provided in DT to handle
> > +          broken case where bootloader doesn't initialise it or SMP
> > +          where read_c0_brcm_cbr() returns 0 from TP1.
> 
> Why is a ?linux? function name in the binding? Surely this is just
> "or in SMP systems where reading CBR returns 0 from...", no? Ditto
> above.
>

It's really just a reference to reading c0 register at an offset, that
is why I was so specific. Ok I will be more verbose.

> 
> > +        $ref: /schemas/types.yaml#/definitions/uint32
> > +
> >      patternProperties:
> >        "^cpu@[0-9]$":
> >          type: object
> > @@ -64,6 +73,20 @@ properties:
> >      required:
> >        - mips-hpt-frequency
> >  
> > +if:
> > +  properties:
> > +    compatible:
> > +      contains:
> > +        enum:
> > +          - brcm,bcm6358
> > +          - brcm,bcm6368
> > +
> > +then:
> > +  properties:
> > +    cpus:
> > +      required:
> > +        - brcm,bmips-cbr-reg
> > +
> >  additionalProperties: true
> >  
> >  examples:
> > -- 
> > 2.43.0
> > 



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