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Message-ID: <f72b241f-11ab-4165-af51-14413d4e9f7a@collabora.com>
Date: Fri, 10 May 2024 12:09:21 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Liankun Yang <liankun.yang@...iatek.com>, chunkuang.hu@...nel.org,
p.zabel@...gutronix.de, airlied@...il.com, daniel@...ll.ch,
matthias.bgg@...il.com, jitao.shi@...iatek.com, mac.shen@...iatek.com
Cc: dri-devel@...ts.freedesktop.org, linux-mediatek@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 1/1] Fix get efuse issue for MT8188 DPTX
Il 10/05/24 08:16, Liankun Yang ha scritto:
> Fix get efuse issue for MT8188 DPTX.
>
> Signed-off-by: Liankun Yang <liankun.yang@...iatek.com>
I may agree with this commit, but:
1. The commit title is incorrect - I don't see "drm/mediatek:" - please look at
the history to find out the right titles for your commits; and
2. The commit description isn't describing anything, you're just repeating the
title: please add a description. What was wrong? What did you fix precisely?
3. There's no Fixes tag. Please add the relevant one.
Regards,
Angelo
> ---
> drivers/gpu/drm/mediatek/mtk_dp.c | 85 ++++++++++++++++++++++++++++++-
> 1 file changed, 84 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
> index 2136a596efa1..32b36b63a4e1 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
> @@ -145,6 +145,89 @@ struct mtk_dp_data {
> u16 audio_m_div2_bit;
> };
>
> +static const struct mtk_dp_efuse_fmt mt8188_dp_efuse_fmt[MTK_DP_CAL_MAX] = {
> + [MTK_DP_CAL_GLB_BIAS_TRIM] = {
> + .idx = 0,
> + .shift = 10,
> + .mask = 0x1f,
> + .min_val = 1,
> + .max_val = 0x1e,
> + .default_val = 0xf,
> + },
> + [MTK_DP_CAL_CLKTX_IMPSE] = {
> + .idx = 0,
> + .shift = 15,
> + .mask = 0xf,
> + .min_val = 1,
> + .max_val = 0xe,
> + .default_val = 0x8,
> + },
> + [MTK_DP_CAL_LN_TX_IMPSEL_PMOS_0] = {
> + .idx = 1,
> + .shift = 0,
> + .mask = 0xf,
> + .min_val = 1,
> + .max_val = 0xe,
> + .default_val = 0x8,
> + },
> + [MTK_DP_CAL_LN_TX_IMPSEL_PMOS_1] = {
> + .idx = 1,
> + .shift = 8,
> + .mask = 0xf,
> + .min_val = 1,
> + .max_val = 0xe,
> + .default_val = 0x8,
> + },
> + [MTK_DP_CAL_LN_TX_IMPSEL_PMOS_2] = {
> + .idx = 1,
> + .shift = 16,
> + .mask = 0xf,
> + .min_val = 1,
> + .max_val = 0xe,
> + .default_val = 0x8,
> + },
> + [MTK_DP_CAL_LN_TX_IMPSEL_PMOS_3] = {
> + .idx = 1,
> + .shift = 24,
> + .mask = 0xf,
> + .min_val = 1,
> + .max_val = 0xe,
> + .default_val = 0x8,
> + },
> + [MTK_DP_CAL_LN_TX_IMPSEL_NMOS_0] = {
> + .idx = 1,
> + .shift = 4,
> + .mask = 0xf,
> + .min_val = 1,
> + .max_val = 0xe,
> + .default_val = 0x8,
> + },
> + [MTK_DP_CAL_LN_TX_IMPSEL_NMOS_1] = {
> + .idx = 1,
> + .shift = 12,
> + .mask = 0xf,
> + .min_val = 1,
> + .max_val = 0xe,
> + .default_val = 0x8,
> + },
> + [MTK_DP_CAL_LN_TX_IMPSEL_NMOS_2] = {
> + .idx = 1,
> + .shift = 20,
> + .mask = 0xf,
> + .min_val = 1,
> + .max_val = 0xe,
> + .default_val = 0x8,
> + },
> + [MTK_DP_CAL_LN_TX_IMPSEL_NMOS_3] = {
> + .idx = 1,
> + .shift = 28,
> + .mask = 0xf,
> + .min_val = 1,
> + .max_val = 0xe,
> + .default_val = 0x8,
> + },
> +};
> +
> static const struct mtk_dp_efuse_fmt mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = {
> [MTK_DP_CAL_GLB_BIAS_TRIM] = {
> .idx = 3,
> @@ -2758,7 +2841,7 @@ static SIMPLE_DEV_PM_OPS(mtk_dp_pm_ops, mtk_dp_suspend, mtk_dp_resume);
> static const struct mtk_dp_data mt8188_dp_data = {
> .bridge_type = DRM_MODE_CONNECTOR_DisplayPort,
> .smc_cmd = MTK_DP_SIP_ATF_VIDEO_UNMUTE,
> - .efuse_fmt = mt8195_dp_efuse_fmt,
> + .efuse_fmt = mt8188_dp_efuse_fmt,
> .audio_supported = true,
> .audio_pkt_in_hblank_area = true,
> .audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
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