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Message-ID: <2008e2e7-59f6-437c-a3c6-1fb9e31bf635@sirena.org.uk>
Date: Tue, 14 May 2024 10:30:38 +0100
From: Mark Brown <broonie@...nel.org>
To: Andy Shevchenko <andy.shevchenko@...il.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Patrick Rudolph <patrick.rudolph@...ements.com>,
naresh.solanki@...ements.com, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] pinctrl: cy8c95x0: Cache muxed registers
On Tue, May 14, 2024 at 12:23:19PM +0300, Andy Shevchenko wrote:
> On Tue, May 14, 2024 at 12:02 PM Mark Brown <broonie@...nel.org> wrote:
> > If there's paging of registers then regmap supports this with the ranges
> > feature, you can tell regmap where the window is in the physical
> > register map and which register to use to switch pages and have regmap
> > export the underlying registers as a linear range of virtual registers.
> In this chip there are two ranges that are dependent on a selector,
> one is for port selection (which the original change is about) and
> another is for PWM (IIRC). Note that they are orthogonal to each
> other, meaning they have their own selector registers.
That's fine, you can have as many ranges as you like.
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