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Message-ID: <20240517061713.95803-2-hal.feng@starfivetech.com>
Date: Fri, 17 May 2024 14:17:11 +0800
From: Hal Feng <hal.feng@...rfivetech.com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Conor Dooley <conor+dt@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>
Cc: Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Hal Feng <hal.feng@...rfivetech.com>,
devicetree@...r.kernel.org,
linux-serial@...r.kernel.org,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1 1/3] dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC
The UART of StarFive JH7110 has two reset signals.
Both of them are necessary for JH7110 to initialize UART.
Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
---
.../bindings/serial/snps-dw-apb-uart.yaml | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
index 1001d2a6ace8..a6396c5cbfb1 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
@@ -13,6 +13,16 @@ allOf:
- $ref: serial.yaml#
- $ref: rs485.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,jh7110-uart
+ then:
+ properties:
+ resets:
+ minItems: 2
+
properties:
compatible:
oneOf:
@@ -48,6 +58,7 @@ properties:
- enum:
- starfive,jh7100-hsuart
- starfive,jh7100-uart
+ - starfive,jh7110-uart
- const: snps,dw-apb-uart
- const: snps,dw-apb-uart
@@ -82,7 +93,8 @@ properties:
type: boolean
resets:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
reg-shift: true
--
2.43.2
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