linux-kernel - Re: [PATCH v6 16/49] x86/platform/intel-mid: Switch to new Intel CPU model defines

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Message-ID: <Zkyrtgj7yQR8H-Bz@smile.fi.intel.com>
Date: Tue, 21 May 2024 17:12:06 +0300
From: Andy Shevchenko <andy@...nel.org>
To: Tony Luck <tony.luck@...el.com>
Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
	Borislav Petkov <bp@...en8.de>,
	Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
	"H. Peter Anvin" <hpa@...or.com>,
	"Peter Zijlstra (Intel)" <peterz@...radead.org>,
	Uros Bizjak <ubizjak@...il.com>,
	Rick Edgecombe <rick.p.edgecombe@...el.com>,
	Arnd Bergmann <arnd@...db.de>, Mateusz Guzik <mjguzik@...il.com>,
	Thomas Renninger <trenn@...e.de>, Andi Kleen <ak@...ux.intel.com>,
	linux-kernel@...r.kernel.org, patches@...ts.linux.dev
Subject: Re: [PATCH v6 16/49] x86/platform/intel-mid: Switch to new Intel CPU
 model defines

On Mon, May 20, 2024 at 03:45:47PM -0700, Tony Luck wrote:
> New CPU #defines encode vendor and family as well as model.

..

> -	switch (boot_cpu_data.x86_model) {
> -	case 0x3C:
> -	case 0x4A:
> +	switch (boot_cpu_data.x86_vfm) {
> +	case INTEL_HASWELL:

Thanks, God^W your series, I just realised that this is quite a mistake.
I mean, you need to remove this line (with HASWELL) from this file.

  Fixes: bc20aa48bbb3 ("x86, intel-mid: Add Merrifield platform support")

HASWELL was never a part of Intel MID initiative (in a sense how it's
organised in HW and FW).

> +	case INTEL_ATOM_SILVERMONT_MID:
>  		x86_platform.legacy.rtc = 1;
>  		break;

So, TL;DR: Please add the patch, I will give a tag to it immediately.

-- 
With Best Regards,
Andy Shevchenko