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Message-Id: <20240523080330.1860074-23-Delphine_CC_Chiu@wiwynn.com>
Date: Thu, 23 May 2024 16:03:27 +0800
From: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
To: patrick@...cx.xyz,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...econstruct.com.au>
Cc: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v8 22/23] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle
Revise duty cycle SMB11 and SMB16 to high: 40%, low: 60%,
to meet 400kHz-i2c clock low time spec (> 1.3 us) from EE request
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 62dfe935cbcd..21ca22281ef8 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -761,6 +761,7 @@ eeprom@54 {
&i2c10 {
status = "okay";
bus-frequency = <400000>;
+ i2c-clk-high-min-percent = <40>;
i2c-mux@74 {
compatible = "nxp,pca9544";
i2c-mux-idle-disconnect;
@@ -1314,6 +1315,7 @@ &i2c15 {
mctp-controller;
multi-master;
bus-frequency = <400000>;
+ i2c-clk-high-min-percent = <40>;
mctp@10 {
compatible = "mctp-i2c-controller";
--
2.25.1
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