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Date: Fri, 24 May 2024 11:24:50 -0400
From: Sean Anderson <sean.anderson@...ux.dev>
To: Dan Carpenter <dan.carpenter@...aro.org>
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof WilczyƄski <kw@...ux.com>,
 Rob Herring <robh@...nel.org>, linux-pci@...r.kernel.org,
 Michal Simek <michal.simek@....com>,
 Thippeswamy Havalige <thippeswamy.havalige@....com>,
 linux-arm-kernel@...ts.infradead.org, Bjorn Helgaas <bhelgaas@...gle.com>,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 6/7] PCI: xilinx-nwl: Add phy support

On 5/24/24 10:59, Dan Carpenter wrote:
> On Mon, May 20, 2024 at 10:54:01AM -0400, Sean Anderson wrote:
>> +static int nwl_pcie_phy_enable(struct nwl_pcie *pcie)
>> +{
>> +	int i, ret;
>> +
>> +	for (i = 0; i < ARRAY_SIZE(pcie->phy); i++) {
>> +		ret = phy_init(pcie->phy[i]);
>> +		if (ret)
>> +			goto err;
>> +
>> +		ret = phy_power_on(pcie->phy[i]);
>> +		if (ret) {
>> +			WARN_ON(phy_exit(pcie->phy[i]));
>> +			goto err;
>> +		}
>> +	}
>> +
>> +	return 0;
>> +
>> +err:
>> +	while (--i) {
> 
> This doesn't work.  If we fail on the first iteration, then it will
> lead to an array underflow.  It should be while (--i >= 0) or
> while (i--).  I prefer the first, but the second format works for people
> who use unsigned iterators.

Thanks, will fix.

--Sean

>> +		WARN_ON(phy_power_off(pcie->phy[i]));
>> +		WARN_ON(phy_exit(pcie->phy[i]));
>> +	}
>> +
>> +	return ret;
>> +}
> 
> regards,
> dan carpenter
> 


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