linux-kernel - Re: [PATCH] iommu/amd: Fix panic accessing amd_iommu_enable

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Fri, 31 May 2024 11:41:14 +0530
From: Vasant Hegde <vasant.hegde@....com>
To: Dimitri Sivanich <sivanich@....com>, Yi Zhang <yi.zhang@...hat.com>,
 "Tian, Kevin" <kevin.tian@...el.com>, Baolu Lu <baolu.lu@...ux.intel.com>,
 Joerg Roedel <joro@...tes.org>,
 Suravee Suthikulpanit <suravee.suthikulpanit@....com>,
 Will Deacon <will@...nel.org>, Robin Murphy <robin.murphy@....com>,
 David Wang <00107082@....com>,
 Shinichiro Kawasaki <shinichiro.kawasaki@....com>, iommu@...ts.linux.dev
Cc: linux-kernel@...r.kernel.org, Steve Wahl <steve.wahl@....com>,
 Russ Anderson <russ.anderson@....com>
Subject: Re: [PATCH] iommu/amd: Fix panic accessing amd_iommu_enable_faulting



On 5/31/2024 12:06 AM, Dimitri Sivanich wrote:
> This fixes a bug introduced by commit d74169ceb0d2 ("iommu/vt-d: Allocate
> DMAR fault interrupts locally").  The panic happens when
> amd_iommu_enable_faulting is called from CPUHP_AP_ONLINE_DYN context.
> 
> Fixes: d74169ceb0d2 ("iommu/vt-d: Allocate DMAR fault interrupts locally")
> Signed-off-by: Dimitri Sivanich <sivanich@....com>
> Tested-by: Yi Zhang <yi.zhang@...hat.com>

Reviewed-by: Vasant Hegde <vasant.hegde@....com>

-Vasant

> ---
>  drivers/iommu/amd/init.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
> index a18e74878f68..b02b959d12af 100644
> --- a/drivers/iommu/amd/init.c
> +++ b/drivers/iommu/amd/init.c
> @@ -3353,7 +3353,7 @@ int amd_iommu_reenable(int mode)
>  	return 0;
>  }
>  
> -int __init amd_iommu_enable_faulting(unsigned int cpu)
> +int amd_iommu_enable_faulting(unsigned int cpu)
>  {
>  	/* We enable MSI later when PCI is initialized */
>  	return 0;