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Message-ID: <2a8c0faf-5e56-4140-977b-da312136435f@amd.com>
Date: Mon, 3 Jun 2024 15:16:30 -0700
From: "Nelson, Shannon" <shannon.nelson@....com>
To: David Christensen <drc@...ux.ibm.com>,
Brett Creeley <brett.creeley@....com>,
"supporter:PENSANDO ETHERNET DRIVERS" <drivers@...sando.io>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
"open list:PENSANDO ETHERNET DRIVERS" <netdev@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH net-next v2] ionic: advertise 52-bit addressing limitation
for MSI-X
On 6/3/2024 2:27 PM, David Christensen wrote:
>
> Current ionic devices only support 52 internal physical address
> lines. This is sufficient for x86_64 systems which have similar
> limitations but does not apply to all other architectures,
> notably IBM POWER (ppc64). To ensure that MSI/MSI-X vectors are
> not set outside the physical address limits of the NIC, set the
> no_64bit_msi value of the pci_dev structure during device probe.
>
> Signed-off-by: David Christensen <drc@...ux.ibm.com>
> ---
> v2: Limit change to ppc64 systems as suggested
> ---
Works for me, thanks!
Reviewed-by: Shannon Nelson <shannon.nelson@....com>
> drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c b/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c
> index 6ba8d4aca0a0..a7146d50f814 100644
> --- a/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c
> +++ b/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c
> @@ -326,6 +326,11 @@ static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
> goto err_out;
> }
>
> +#ifdef CONFIG_PPC64
> + /* Ensure MSI/MSI-X interrupts lie within addressable physical memory */
> + pdev->no_64bit_msi = 1;
> +#endif
> +
> err = ionic_setup_one(ionic);
> if (err)
> goto err_out;
> --
> 2.43.0
>
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