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Message-ID: <Zl27FJVU_YHokCiD@hovoldconsulting.com>
Date: Mon, 3 Jun 2024 14:46:12 +0200
From: Johan Hovold <johan@...nel.org>
To: Abel Vesa <abel.vesa@...aro.org>
Cc: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] phy: qcom: qmp-pcie: Add X1E80100 Gen4 4-lane mode
support
On Fri, May 31, 2024 at 07:06:45PM +0300, Abel Vesa wrote:
> The PCIe 6th instance from X1E80100 can be used in both 4-lane mode or
> 2-lane mode. Add the configuration and compatible for the 4-lane mode.
Same language nits as for patch 1/1.
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
I tried this patch along with the DT changes and the link on the CRD
still comes up as 2-lane:
qcom-pcie 1bf8000.pci: PCIe Gen.4 x2 link up
so something appears to be wrong here. (I noticed the same with your
next branch last week.)
How did you test this? Does the link actually come up as 4-lane for you?
Johan
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