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Message-ID: <20240610144637.477954-6-jm@ti.com>
Date: Mon, 10 Jun 2024 09:46:34 -0500
From: Judith Mendez <jm@...com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
William Breathitt Gray <wbg@...nel.org>, Nishanth Menon <nm@...com>
CC: <linux-iio@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, Vignesh Raghavendra <vigneshr@...com>,
Tero
Kristo <kristo@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>,
David
Lechner <david@...hnology.com>
Subject: [PATCH v4 5/8] arm64: dts: ti: k3-am62p-main: Add eQEP nodes
Add eQEP device tree nodes 0-2 for AM62P5 SoC.
Signed-off-by: Judith Mendez <jm@...com>
---
Changes since v3:
- No change
---
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 27 +++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 900d1f9530a2a..ede7351a4d864 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -857,6 +857,33 @@ ecap2: pwm@...20000 {
status = "disabled";
};
+ eqep0: counter@...00000 {
+ compatible = "ti,am62-eqep";
+ reg = <0x00 0x23200000 0x00 0x100>;
+ power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 59 0>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+
+ eqep1: counter@...10000 {
+ compatible = "ti,am62-eqep";
+ reg = <0x00 0x23210000 0x00 0x100>;
+ power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 60 0>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+
+ eqep2: counter@...20000 {
+ compatible = "ti,am62-eqep";
+ reg = <0x00 0x23220000 0x00 0x100>;
+ power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 62 0>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+
main_mcan0: can@...01000 {
compatible = "bosch,m_can";
reg = <0x00 0x20701000 0x00 0x200>,
--
2.45.1
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