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Message-ID: <CADrjBPocKu4iSLBu12RdLVo7O3FujF-346aYBOWCn3JutyjX9Q@mail.gmail.com>
Date: Wed, 12 Jun 2024 09:02:57 +0100
From: Peter Griffin <peter.griffin@...aro.org>
To: André Draszik <andre.draszik@...aro.org>
Cc: Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>,
Sam Protsenko <semen.protsenko@...aro.org>, Tudor Ambarus <tudor.ambarus@...aro.org>,
Will McVicker <willmcvicker@...gle.com>, kernel-team@...roid.com,
linux-phy@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH 1/5] phy: exynos5-usbdrd: uniform order of register bit macros
Hi André,
On Tue, 7 May 2024 at 15:14, André Draszik <andre.draszik@...aro.org> wrote:
>
> Most of the macros are ordered high -> low, but there are some
> outliers.
>
> Order them all uniformly from high to low. This will allow adding
> additional register (field) definitions in a consistent way.
>
> While at it, also remove some extra empty lines to group register bit
> field definitions together with the relevant register. This makes the
> registers easier to distinguish visually.
>
> No functional change.
>
> Signed-off-by: André Draszik <andre.draszik@...aro.org>
> ---
Reviewed-by: Peter Griffin <peter.griffin@...aro.org>
regards,
Peter
[..]
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