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Message-ID: <CADrjBPqM-6vu-9+ZZ-=BKqnAn+vngELBgrLtU1ua_DMrDaWjXQ@mail.gmail.com>
Date: Wed, 12 Jun 2024 10:36:25 +0100
From: Peter Griffin <peter.griffin@...aro.org>
To: André Draszik <andre.draszik@...aro.org>
Cc: Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>, 
	Krzysztof Kozlowski <krzk@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>, 
	Sam Protsenko <semen.protsenko@...aro.org>, Tudor Ambarus <tudor.ambarus@...aro.org>, 
	Will McVicker <willmcvicker@...gle.com>, kernel-team@...roid.com, 
	linux-phy@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org, 
	linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH 4/5] phy: exynos5-usbdrd: fix definition of EXYNOS5_FSEL_26MHZ

Hi André,

On Tue, 7 May 2024 at 15:14, André Draszik <andre.draszik@...aro.org> wrote:
>
> Using 0x82 seems odd, where everything else is just a sequence.
>
> On E850, this macro isn't used (as a register value), only to assign
> its value to the 'extrefclk' variable, which is otherwise unused on
> that platform. Older platforms don't appear to support 26MHz in the
> first place (since this macro was added for E850).
>
> Furthermore, the downstream driver uses 0x82 to denote
> USBPHY_REFCLK_DIFF_26MHZ (whatever that means exactly), but for all the
> other values we match downstream's non-DIFF macros.
>
> Update to avoid confusion. No functional change intended.
>
> Signed-off-by: André Draszik <andre.draszik@...aro.org>
> ---

Reviewed-by:  Peter Griffin <peter.griffin@...aro.org>

regards,

Peter

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