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Message-ID: <87ed8vu033.ffs@tglx>
Date: Mon, 17 Jun 2024 16:15:44 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Marc Zyngier <maz@...nel.org>
Cc: Shivamurthy Shastri <shivamurthy.shastri@...utronix.de>,
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Subject: Re: [PATCH v3 14/24] genirq/gic-v3-mbi: Remove unused wired MSI
mechanics
On Mon, Jun 17 2024 at 16:02, Thomas Gleixner wrote:
> On Mon, Jun 17 2024 at 14:03, Marc Zyngier wrote:
>> Patch 9/24 rewrites the mbigen driver. Which has nothing to do with
>> what the gic-v3-mbi code does. They are different blocks, and the sole
>> machine that has the mbigen IP doesn't have any gic-v3-mbi support.
>> All they have in common are 3 random letters.
>>
>> What you are doing here is to kill any support for *devices* that need
>> to signal level-triggered MSIs in that driver, and nothing to do with
>> wire-MSI translation.
>>
>> So what replaces it?
>
> Hrm. I must have misread this mess. Let me stare some more.
Ok. Found my old notes.
AFAICT _all_ users of platform_device_msi_init_and_alloc_irqs():
ufs_qcom_config_esi()
smmu_pmu_setup_msi()
flexrm_mbox_probe()
arm_smmu_setup_msis()
hidma_request_msi()
mv_xor_v2_probe()
just install their special MSI write callback. I don't see any of those
setting up LEVEL triggered MSIs.
But then I'm might be missing something. If so can you point me please
to the usage instance which actually uses level signaled MSI?
Thanks,
tglx
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