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Message-ID: <93f97c4b-b65c-4386-864f-9987a55435b0@kernel.org>
Date: Thu, 20 Jun 2024 09:29:21 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Sam Protsenko <semen.protsenko@...aro.org>,
Ćukasz Stelmach <l.stelmach@...sung.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Rob Herring <robh@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: Anand Moon <linux.amoon@...il.com>, Olivia Mackall <olivia@...enic.com>,
Herbert Xu <herbert@...dor.apana.org.au>,
Alim Akhtar <alim.akhtar@...sung.com>, linux-samsung-soc@...r.kernel.org,
linux-crypto@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/7] hwrng: exynos: Implement bus clock control
On 18/06/2024 22:45, Sam Protsenko wrote:
> Some SoCs like Exynos850 might require the SSS bus clock (PCLK) to be
> enabled in order to access TRNG registers. Add and handle the optional
> PCLK clock accordingly to make it possible.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@...aro.org>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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