linux-kernel - Re: [PATCH v2 4/7] hwrng: exynos: Implement bus clock control

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Message-ID: <CANAwSgS_EjzPpxvz22TjD9dm3cF8Pd1zVXBqCm6bcci-oDL+Hw@mail.gmail.com>
Date: Thu, 20 Jun 2024 14:57:17 +0530
From: Anand Moon <linux.amoon@...il.com>
To: Sam Protsenko <semen.protsenko@...aro.org>
Cc: Łukasz Stelmach <l.stelmach@...sung.com>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Olivia Mackall <olivia@...enic.com>, Herbert Xu <herbert@...dor.apana.org.au>, 
	Alim Akhtar <alim.akhtar@...sung.com>, linux-samsung-soc@...r.kernel.org, 
	linux-crypto@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/7] hwrng: exynos: Implement bus clock control

Hi Sam,

On Wed, 19 Jun 2024 at 02:15, Sam Protsenko <semen.protsenko@...aro.org> wrote:
>
> Some SoCs like Exynos850 might require the SSS bus clock (PCLK) to be
> enabled in order to access TRNG registers. Add and handle the optional
> PCLK clock accordingly to make it possible.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@...aro.org>
> ---
> Changes in v2:
>   - Used devm_clk_get_optional_enabled() to avoid calling
>     clk_prepare_enable() for PCLK
>

Reviewed-by: Anand Moon <linux.amoon@...il.com>

Thanks

-Anand