linux-kernel - Re: [PATCH] arm64: dts: ti: k3-j784s4-main: Add node for EHRPWMs

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Date: Fri, 21 Jun 2024 20:51:02 +0530
From: Vignesh Raghavendra <vigneshr@...com>
To: Udit Kumar <u-kumar1@...com>, <nm@...com>
CC: <kristo@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Dasnavis Sabiya
	<sabiya.d@...com>
Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4-main: Add node for EHRPWMs



On 03/06/24 16:59, Udit Kumar wrote:
> From: Dasnavis Sabiya <sabiya.d@...com>
> 
> Add dts nodes for 6 EHRPWM instances on SoC.
> 
> Signed-off-by: Dasnavis Sabiya <sabiya.d@...com>
> Signed-off-by: Udit Kumar <u-kumar1@...com>
> ---
>  arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 66 ++++++++++++++++++++++
>  1 file changed, 66 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 6a4554c6c9c1..f6fc2ce55f9b 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -75,6 +75,72 @@ serdes_ln_ctrl: mux-controller@...0 {
>  				      <J784S4_SERDES4_LANE2_EDP_LANE2>,
>  				      <J784S4_SERDES4_LANE3_EDP_LANE3>;
>  		};
> +
> +		ehrpwm_tbclk: clock-controller@...0 {
> +			compatible = "ti,am654-ehrpwm-tbclk";
> +			reg = <0x4140 0x18>;
> +			#clock-cells = <1>;
> +		};
> +	};
> +
> +	main_ehrpwm0: pwm@...0000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;


This needs to be ordered as per

https://www.kernel.org/doc/Documentation/devicetree/bindings/dts-coding-style.rst
(compatible is immediately followed by reg)

Will fix all the nodes locally before merging

> +		reg = <0x00 0x3000000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 0>, <&k3_clks 219 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm1: pwm@...0000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3010000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 1>, <&k3_clks 220 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm2: pwm@...0000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3020000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 2>, <&k3_clks 221 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm3: pwm@...0000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3030000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 3>, <&k3_clks 222 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm4: pwm@...0000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3040000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 4>, <&k3_clks 223 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm5: pwm@...0000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3050000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 5>, <&k3_clks 224 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 224 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
>  	};
>  
>  	gic500: interrupt-controller@...0000 {

-- 
Regards
Vignesh