lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <e344335f-be60-4568-97be-728257684310@linaro.org>
Date: Sat, 22 Jun 2024 13:09:23 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Tengfei Fan <quic_tengfan@...cinc.com>, andersson@...nel.org,
 robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
 dmitry.baryshkov@...aro.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, kernel@...cinc.com,
 Fenglin Wu <quic_fenglinw@...cinc.com>
Subject: Re: [PATCH v10 3/4] arm64: dts: qcom: add base AIM300 dtsi

On 20.06.2024 2:46 AM, Tengfei Fan wrote:
> 
> 
> On 6/19/2024 3:06 AM, Konrad Dybcio wrote:
>>
>>
>> On 6/18/24 09:22, Tengfei Fan wrote:
>>> AIM300 Series is a highly optimized family of modules designed to
>>> support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC
>>> chip etc.
>>> Here is a diagram of AIM300 SoM:
>>>            +----------------------------------------+
>>>            |AIM300 SoM                              |
>>>            |                                        |
>>>            |                           +-----+      |
>>>            |                      |--->| UFS |      |
>>>            |                      |    +-----+      |
>>>            |                      |                 |
>>>            |                      |                 |
>>>       3.7v |  +-----------------+ |    +---------+  |
>>>    ---------->|       PMIC      |----->| QCS8550 |  |
>>>            |  +-----------------+      +---------+  |
>>>            |                      |                 |
>>>            |                      |                 |
>>>            |                      |    +-----+      |
>>>            |                      |--->| ... |      |
>>>            |                           +-----+      |
>>>            |                                        |
>>>            +----------------------------------------+
>>>
>>> Co-developed-by: Fenglin Wu <quic_fenglinw@...cinc.com>
>>> Signed-off-by: Fenglin Wu <quic_fenglinw@...cinc.com>
>>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>>> Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
>>> ---
>>
>> [...]
>>
>>> +&ufs_mem_hc {
>>> +    reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
>>> +    vcc-supply = <&vreg_l17b_2p5>;
>>> +    vcc-max-microamp = <1300000>;
>>> +    vccq-supply = <&vreg_l1g_1p2>;
>>> +    vccq-max-microamp = <1200000>;
>>> +    vdd-hba-supply = <&vreg_l3g_1p2>;
>>
>> These regulators should generally have:
>>
>> regulator-allow-set-load;
>> regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>>                             RPMH_REGULATOR_MODE_HPM>;
>>
>> although the current setup you have never lets them exit HPM
>>
>> Konrad
> 
> I understand your point is that these settings need to be added to allthe child regulator nodes of regulators-0, regulators-1, regulators-2, regulators-3, regulators-4 and regulators-5. Is that correct?

No, I only meant the three references in the UFS node (l17b, l1g, l3g),
although I suppose such properties should be there by default on all
regulators in order to save power.. but most boards don't do that (yet),
as nobody wants to waste their time with potentially one more thing to
debug

Konrad

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ