linux-kernel - Re: [PATCH v10 3/4] arm64: dts: qcom: add base AIM300 dtsi

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Message-ID: <af2a373d-9627-4067-80d7-3029e6f0fa34@quicinc.com>
Date: Mon, 24 Jun 2024 10:22:21 +0800
From: Tengfei Fan <quic_tengfan@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@...aro.org>, <andersson@...nel.org>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <dmitry.baryshkov@...aro.org>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <kernel@...cinc.com>,
        Fenglin Wu
	<quic_fenglinw@...cinc.com>
Subject: Re: [PATCH v10 3/4] arm64: dts: qcom: add base AIM300 dtsi



On 6/22/2024 7:09 PM, Konrad Dybcio wrote:
> On 20.06.2024 2:46 AM, Tengfei Fan wrote:
>>
>>
>> On 6/19/2024 3:06 AM, Konrad Dybcio wrote:
>>>
>>>
>>> On 6/18/24 09:22, Tengfei Fan wrote:
>>>> AIM300 Series is a highly optimized family of modules designed to
>>>> support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC
>>>> chip etc.
>>>> Here is a diagram of AIM300 SoM:
>>>>             +----------------------------------------+
>>>>             |AIM300 SoM                              |
>>>>             |                                        |
>>>>             |                           +-----+      |
>>>>             |                      |--->| UFS |      |
>>>>             |                      |    +-----+      |
>>>>             |                      |                 |
>>>>             |                      |                 |
>>>>        3.7v |  +-----------------+ |    +---------+  |
>>>>     ---------->|       PMIC      |----->| QCS8550 |  |
>>>>             |  +-----------------+      +---------+  |
>>>>             |                      |                 |
>>>>             |                      |                 |
>>>>             |                      |    +-----+      |
>>>>             |                      |--->| ... |      |
>>>>             |                           +-----+      |
>>>>             |                                        |
>>>>             +----------------------------------------+
>>>>
>>>> Co-developed-by: Fenglin Wu <quic_fenglinw@...cinc.com>
>>>> Signed-off-by: Fenglin Wu <quic_fenglinw@...cinc.com>
>>>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>>>> Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
>>>> ---
>>>
>>> [...]
>>>
>>>> +&ufs_mem_hc {
>>>> +    reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
>>>> +    vcc-supply = <&vreg_l17b_2p5>;
>>>> +    vcc-max-microamp = <1300000>;
>>>> +    vccq-supply = <&vreg_l1g_1p2>;
>>>> +    vccq-max-microamp = <1200000>;
>>>> +    vdd-hba-supply = <&vreg_l3g_1p2>;
>>>
>>> These regulators should generally have:
>>>
>>> regulator-allow-set-load;
>>> regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>>>                              RPMH_REGULATOR_MODE_HPM>;
>>>
>>> although the current setup you have never lets them exit HPM
>>>
>>> Konrad
>>
>> I understand your point is that these settings need to be added to allthe child regulator nodes of regulators-0, regulators-1, regulators-2, regulators-3, regulators-4 and regulators-5. Is that correct?
> 
> No, I only meant the three references in the UFS node (l17b, l1g, l3g),
> although I suppose such properties should be there by default on all
> regulators in order to save power.. but most boards don't do that (yet),
> as nobody wants to waste their time with potentially one more thing to
> debug

Thank you for clarifying this. I will create a new patch to support 
these since this patch series have already been applied.

> 
> Konrad

-- 
Thx and BRs,
Tengfei Fan