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Message-ID: <20240622175205.GA1432837@bhelgaas>
Date: Sat, 22 Jun 2024 12:52:05 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: "zhoushengqing@...info.com" <zhoushengqing@...info.com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>,
linux-pci <linux-pci@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: Re: [PATCH] PCI: Enable io space 1k granularity for intel cpu
root port
On Sat, Jun 22, 2024 at 11:06:18PM +0800, zhoushengqing@...info.com wrote:
> >> This patch add 1k granularity for intel root port bridge.Intel latest
>
>
>
> >> server CPU support 1K granularity,And there is an BIOS setup item named
>
>
>
I don't know what your email agent is doing to add all these extra
blank lines, but it makes it painful to read/reply:
https://lore.kernel.org/all/2024062223061743562815@ttyinfo.com/
> >Can you implement this as a quirk similar to quirk_p64h2_1k_io()?
> >
> >I don't want to clutter the generic code with device-specific
> >things like this.
>
> I have attempted to implement this patch in quirks.c.But there
> doesn't seem to be a suitable DECLARE_PCI_FIXUP* to do this.because
> the patch is not targeting the device itself, It targets other P2P
> devices with the same bus number.
If I understand the patch correctly, if a [8086:09a2] device on a root
bus has EN1K set, *every* bridge (every Root Port in this case because
I assume this is a PCIe configuration) on the same bus supports 1K
granularity?
That seems like a really broken kind of encapsulation. I'd be
surprised if there were not a bit in each of those Root Ports that
indicates this.
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