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Date: Sun, 23 Jun 2024 10:24:56 +0300
From: Roger Quadros <rogerq@...nel.org>
To: Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>, 
 Tero Kristo <kristo@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>
Cc: srk@...com, praneeth@...com, linux-arm-kernel@...ts.infradead.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 Roger Quadros <rogerq@...nel.org>
Subject: [PATCH] arm: dts: k3-am642-evm-nand: Add bootph-all to NAND
 related nodes

NAND boot would require these nodes to be present at early stage.
Ensure that by adding "bootph-all" to relevant nodes.

Signed-off-by: Roger Quadros <rogerq@...nel.org>
---
 arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso
index dc70b6fbc3d7..babd681666f4 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso
@@ -13,6 +13,7 @@
 
 &main_pmx0 {
 	gpmc0_pins_default: gpmc0-pins-default {
+		bootph-all;
 		pinctrl-single,pins = <
 			AM64X_IOPAD(0x0094, PIN_INPUT, 7) /* (T19) GPMC0_BE1n.GPIO0_36 */
 			AM64X_IOPAD(0x003c, PIN_INPUT, 0) /* (T20) GPMC0_AD0 */
@@ -49,7 +50,9 @@ AM64X_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (N17) GPMC0_DIR */
 };
 
 &main_gpio0 {
+	bootph-all;
 	gpio0-36 {
+		bootph-all;
 		gpio-hog;
 		gpios = <36 0>;
 		input;
@@ -58,10 +61,12 @@ gpio0-36 {
 };
 
 &elm0 {
+	bootph-all;
 	status = "okay";
 };
 
 &gpmc0 {
+	bootph-all;
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&gpmc0_pins_default>;
@@ -69,6 +74,7 @@ &gpmc0 {
 	#size-cells = <1>;
 
 	nand@0,0 {
+		bootph-all;
 		compatible = "ti,am64-nand";
 		reg = <0 0 64>;		/* device IO registers */
 		interrupt-parent = <&gpmc0>;

---
base-commit: 4031a2866a9f0f5c585cfee65b3fb5ab17c95276
change-id: 20240623-am642-evm-nand-bootph-03b68b4c9d9e

Best regards,
-- 
Roger Quadros <rogerq@...nel.org>


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