linux-kernel - RE: [PATCH] arm64: Cleanup __cpu_set_tcr

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <000001dac633$45940050$d0bc00f0$@samsung.com>
Date: Mon, 24 Jun 2024 21:37:27 +0900
From: "Seongsu Park" <sgsu.park@...sung.com>
To: <catalin.marinas@....com>, <will@...nel.org>, <ardb@...nel.org>,
	<mark.rutland@....com>
Cc: <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	<infinite.run@...il.com>, <'sgsu.park@...sung.com'>
Subject: RE: [PATCH] arm64: Cleanup __cpu_set_tcr_t0sz()

Dear Will,

Could you check this patch?
This patch will make the code more stable.

Thanks.
Seongsu Park.

> -----Original Message-----
> From: Seongsu Park <sgsu.park@...sung.com>
> Sent: Monday, June 3, 2024 8:03 PM
> To: 'catalin.marinas@....com' <catalin.marinas@....com>; 'will@...nel.org'
> <will@...nel.org>; 'ardb@...nel.org' <ardb@...nel.org>;
> 'mark.rutland@....com' <mark.rutland@....com>
> Cc: 'linux-arm-kernel@...ts.infradead.org' <linux-arm-
> kernel@...ts.infradead.org>; 'linux-kernel@...r.kernel.org' <linux-
> kernel@...r.kernel.org>; 'infinite.run@...il.com' <infinite.run@...il.com>;
> 'sgsu.park@...sung.com' <sgsu.park@...sung.com>
> Subject: RE: [PATCH] arm64: Cleanup __cpu_set_tcr_t0sz()
> 
> Dear All,
> 
> Please check this patch.
> I think this patch is appropriate.
> 
> Thanks.
> Seongsu Park.
> 
> > -----Original Message-----
> > From: Seongsu Park <sgsu.park@...sung.com>
> > Sent: Thursday, May 23, 2024 9:22 PM
> > To: catalin.marinas@....com; will@...nel.org; ardb@...nel.org;
> > mark.rutland@....com
> > Cc: linux-arm-kernel@...ts.infradead.org;
> > linux-kernel@...r.kernel.org; infinite.run@...il.com;
> > sgsu.park@...sung.com
> > Subject: [PATCH] arm64: Cleanup __cpu_set_tcr_t0sz()
> >
> > The T0SZ field of TCR_EL1 occupies bits 0-5 of the register and encode
> > the virtual address space translated by TTBR0_EL1. When updating the
> > field, for example because we are switching to/from the idmap
> > page-table,
> > __cpu_set_tcr_t0sz() erroneously treats its 't0sz' argument as
> > unshifted, resulting in harmless but confusing double shifts by 0 in the
> code.
> >
> > Co-developed-by: Leem ChaeHoon <infinite.run@...il.com>
> > Signed-off-by: Leem ChaeHoon <infinite.run@...il.com>
> > Signed-off-by: Seongsu Park <sgsu.park@...sung.com>
> > ---
> >  arch/arm64/include/asm/mmu_context.h | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/mmu_context.h
> > b/arch/arm64/include/asm/mmu_context.h
> > index c768d16b81a4..bd19f4c758b7 100644
> > --- a/arch/arm64/include/asm/mmu_context.h
> > +++ b/arch/arm64/include/asm/mmu_context.h
> > @@ -72,11 +72,11 @@ static inline void __cpu_set_tcr_t0sz(unsigned
> > long
> > t0sz)  {
> >  	unsigned long tcr = read_sysreg(tcr_el1);
> >
> > -	if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz)
> > +	if ((tcr & TCR_T0SZ_MASK) == t0sz)
> >  		return;
> >
> >  	tcr &= ~TCR_T0SZ_MASK;
> > -	tcr |= t0sz << TCR_T0SZ_OFFSET;
> > +	tcr |= t0sz;
> >  	write_sysreg(tcr, tcr_el1);
> >  	isb();
> >  }
> > --
> > 2.34.1