linux-kernel - Re: [PATCH] RISC-V: fix vector insn load/store width mask

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Date: Wed, 26 Jun 2024 14:21:19 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Jesse Taube <jesse@...osinc.com>
Cc: linux-riscv@...ts.infradead.org, paul.walmsley@...ive.com,
 palmer@...belt.com, aou@...s.berkeley.edu, conor.dooley@...rochip.com,
 namcaov@...il.com, samitolvanen@...gle.com, charlie@...osinc.com,
 andy.chiu@...ive.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] RISC-V: fix vector insn load/store width mask

Hello:

This patch was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <palmer@...osinc.com>:

On Thu,  6 Jun 2024 14:28:00 -0400 you wrote:
> RVFDQ_FL_FS_WIDTH_MASK should be 3 bits [14-12], shifted down by 12 bits.
> Replace GENMASK(3, 0) with GENMASK(2, 0).
> 
> Fixes: cd054837243b ("riscv: Allocate user's vector context in the first-use trap")
> Signed-off-by: Jesse Taube <jesse@...osinc.com>
> ---
>  arch/riscv/include/asm/insn.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Here is the summary with links:
  - RISC-V: fix vector insn load/store width mask
    https://git.kernel.org/riscv/c/04a2aef59cfe

You are awesome, thank you!
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