lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Wed, 26 Jun 2024 16:02:29 +0000
From: "Pafford, Robert J." <pafford.9@...keyemail.osu.edu>
To: Frank Oltmanns <frank@...manns.dev>
CC: Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd
	<sboyd@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec
	<jernej.skrabec@...il.com>,
        Samuel Holland <samuel@...lland.org>,
        Guido Günther <agx@...xcpu.org>,
        Purism Kernel Team
	<kernel@...i.sm>, Ondrej Jirman <megi@....cz>,
        Neil Armstrong
	<neil.armstrong@...aro.org>,
        Jessica Zhang <quic_jesszhan@...cinc.com>,
        Sam
 Ravnborg <sam@...nborg.org>,
        Maarten Lankhorst
	<maarten.lankhorst@...ux.intel.com>,
        Maxime Ripard <mripard@...nel.org>,
        Thomas Zimmermann <tzimmermann@...e.de>,
        David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof
 Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        "linux-clk@...r.kernel.org"
	<linux-clk@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>,
        "linux-sunxi@...ts.linux.dev"
	<linux-sunxi@...ts.linux.dev>,
        "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>,
        "dri-devel@...ts.freedesktop.org"
	<dri-devel@...ts.freedesktop.org>,
        "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>,
        "stable@...r.kernel.org"
	<stable@...r.kernel.org>
Subject: Re: [PATCH v4 1/5] clk: sunxi-ng: common: Support minimum and maximum
 rate

Hi Frank,

Moving to a new for loop makes sense. Let me know when you have a patch
and I'll be glad to test it on my board. I do also wonder if this may
have contributed to some of the HDMI issues seen in the other thread.

Best,
Robert

> Hi Robert,
>
> I'm truly sorry for the trouble the patch has caused you and for my late
> reply!
>
> On 2024-06-14 at 23:52:08 +0000, "Pafford, Robert J." <pafford.9@...keyemail.osu.edu> wrote:
>>> The Allwinner SoC's typically have an upper and lower limit for their
>>> clocks' rates. Up until now, support for that has been implemented
>>> separately for each clock type.
>>>
>>> Implement that functionality in the sunxi-ng's common part making use of
>>> the CCF rate liming capabilities, so that it is available for all clock
>>> types.
>>>
>>> Suggested-by: Maxime Ripard <mripard@...nel.org>
>>> Signed-off-by: Frank Oltmanns <frank@...manns.dev>
>>> Cc: stable@...r.kernel.org
>>> ---
>>>  drivers/clk/sunxi-ng/ccu_common.c | 19 +++++++++++++++++++
>>>  drivers/clk/sunxi-ng/ccu_common.h |  3 +++
>>>  2 files changed, 22 insertions(+)
>>
>> This patch appears to cause a buffer under-read bug due to the call to 'hw_to_ccu_common', which assumes all entries
>> in the desc->hw_clocks->hws array are contained in ccu_common structs.
>>
>> However, not all clocks in the array are contained in ccu_common structs. For example, as part
>> of the "sun20i-d1-ccu" driver, the "pll-video0" clock holds the 'clk_hw' struct inside of a 'clk_fixed_factor' struct,
>> as it is a fixed factor clock based on the "pll-video0-4x" clock, created with the CLK_FIXED_FACTOR_HWS macro.
>> This results in undefined behavior as the hw_to_ccu_common returns an invalid pointer referencing memory before the
>> 'clk_fixed_factor' struct.
>>
>
> Great catch! At first glance, it seems to me that calling
> clk_hw_set_rate_range() in sunxi_ccu_probe() should not have happenend
> in the loop that iterates over the hw_clks.
> 
> Instead we should add one more loop that iterates over the ccu_clks.
> Note, that there is already one such loop but, unfortunately, we can't
> use that as it happens before the hw_clks loop and we can only call
> clk_hw_set_rate_range() after the hw_clk has been registered.
> 
> Hence, I propose to move the offending code to a new loop:
>         for (i = 0; i < desc->num_ccu_clks; i++) {
>                 struct ccu_common *cclk = desc->ccu_clks[i];
> 
>                 if (!cclk)
>                         continue;
> 
>                 if (cclk->max_rate)
>                         clk_hw_set_rate_range(&cclk->hw, common->min_rate,
>                                               common->max_rate);
>                 else
>                         WARN(cclk->min_rate,
>                              "No max_rate, ignoring min_rate of clock %d - %s\n",
>                              i, cclk->hw.init->name);
>         }
> 
> I haven't tested (or even compiled) the above, but I'll test and send a
> patch within the next few days for you to test.
> 
> Thanks again,
>   Frank
> 
>>
>> I have attached kernel warnings from a system based on the "sun8i-t113s.dtsi" device tree, where the memory contains
>> a non-zero value for the min-rate but a zero value for the max-rate, triggering the "No max_rate, ignoring min_rate"
>> warning in the 'sunxi_ccu_probe' function.
>>
>> [...]

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ