[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240626-qps615-v1-1-2ade7bd91e02@quicinc.com>
Date: Wed, 26 Jun 2024 18:07:49 +0530
From: Krishna chaitanya chundru <quic_krichai@...cinc.com>
To: Bartosz Golaszewski <brgl@...ev.pl>,
Manivannan Sadhasivam
<manivannan.sadhasivam@...aro.org>,
Lorenzo Pieralisi
<lpieralisi@...nel.org>,
Krzysztof WilczyĆski
<kw@...ux.com>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas
<bhelgaas@...gle.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konrad.dybcio@...aro.org>,
Jingoo Han <jingoohan1@...il.com>
CC: <quic_vbadigan@...cinc.com>, <quic_skananth@...cinc.com>,
<quic_nitegupt@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
<linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
Krishna chaitanya chundru
<quic_krichai@...cinc.com>
Subject: [PATCH RFC 1/7] dt: bindings: add qcom,qps615.yaml
qps615 is a driver for Qualcomm PCIe switch driver which controls
power & configuration of the hardware.
Add a bindings document for the driver.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
---
.../devicetree/bindings/pci/qcom,qps615.yaml | 73 ++++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,qps615.yaml b/Documentation/devicetree/bindings/pci/qcom,qps615.yaml
new file mode 100644
index 000000000000..f090683f9e2f
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/qcom,qps615.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/qcom,pcie-qps615.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm QPS615 PCIe switch
+
+maintainers:
+ - Krishna chaitanya chundru <quic_krichai@...cinc.com>
+
+description: |
+ Qualcomm QPS615 PCIe switch has one upstream and three downstream
+ ports. One of the downstream ports is used as endpoint device of
+ Ethernet MAC. Other two downstream ports are supposed to connect
+ to external device.
+
+ The power controlled by the GPIO's, if we enable the GPIO's the
+ power to the switch will be on.
+
+ The QPS615 PCIe switch is configured through I2C interface before
+ PCIe link is established.
+
+properties:
+ compatible:
+ enum:
+ - pci1179,0623
+
+ reg:
+ maxItems: 1
+
+ vdd-supply:
+ description: |
+ Phandle to the vdd input voltage which are fixed regulators which
+ in are mapped to the GPIO's.
+
+ switch-i2c-cntrl:
+ description: |
+ phandle to i2c controller which is used to configure the PCIe
+ switch.
+
+required:
+ - compatible
+ - reg
+ - vdd-supply
+ - switch-i2c-cntrl
+
+additionalProperties: false
+
+examples:
+ - |
+ pcie {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ pcie@0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ bus-range = <0x01 0xff>;
+
+ qps615@0 {
+ compatible = "pci1179,0623";
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+
+ vdd-supply = <&vdd>;
+ switch-i2c-cntrl = <&foo>;
+ };
+ };
+ };
--
2.42.0
Powered by blists - more mailing lists