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Date: Thu, 27 Jun 2024 20:09:47 +0800 From: "zheng.dongxiong" <zheng.dongxiong@...look.com> To: manivannan.sadhasivam@...aro.org, fancer.lancer@...il.com, vkoul@...nel.org Cc: dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org, "zheng.dongxiong" <zheng.dongxiong@...look.com> Subject: [PATCH 2/2] damengine: dw-edma: Add msi wartermark configuration HDMA trigger wartermark interrupt, When use the RIE flag. PCIe RC will trigger AER, If msi wartermark addr is not configuration. This patch fix it by add msi wartermark configuration Signed-off-by: zheng.dongxiong <zheng.dongxiong@...look.com> --- drivers/dma/dw-edma/dw-hdma-v0-core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c index d77051d1e..c4d15a7a7 100644 --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c @@ -280,6 +280,9 @@ static void dw_hdma_v0_core_ch_config(struct dw_edma_chan *chan) /* MSI done addr - low, high */ SET_CH_32(dw, chan->dir, chan->id, msi_stop.lsb, chan->msi.address_lo); SET_CH_32(dw, chan->dir, chan->id, msi_stop.msb, chan->msi.address_hi); + /* MSI watermark addr - low, high */ + SET_CH_32(dw, chan->dir, chan->id, msi_watermark.lsb, chan->msi.address_lo); + SET_CH_32(dw, chan->dir, chan->id, msi_watermark.msb, chan->msi.address_hi); /* MSI abort addr - low, high */ SET_CH_32(dw, chan->dir, chan->id, msi_abort.lsb, chan->msi.address_lo); SET_CH_32(dw, chan->dir, chan->id, msi_abort.msb, chan->msi.address_hi); -- 2.34.1
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