linux-kernel - Re: [PATCH 3/7] irqchip: Add Broadcom bcm2712 MSI-X interrupt controller

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Message-ID: <87ikxu1t5e.ffs@tglx>
Date: Thu, 27 Jun 2024 14:12:29 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Stanimir Varbanov <svarbanov@...e.de>, linux-kernel@...r.kernel.org,
 devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-rpi-kernel@...ts.infradead.org, linux-pci@...r.kernel.org, Broadcom
 internal kernel review list <bcm-kernel-feedback-list@...adcom.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Florian Fainelli
 <florian.fainelli@...adcom.com>, Jim Quinlan <jim2101024@...il.com>,
 Nicolas Saenz Julienne <nsaenz@...nel.org>, Bjorn Helgaas
 <bhelgaas@...gle.com>, Lorenzo Pieralisi <lpieralisi@...nel.org>,
 kw@...ux.com, Philipp Zabel <p.zabel@...gutronix.de>, Andrea della Porta
 <andrea.porta@...e.com>, Phil Elwell <phil@...pberrypi.com>, Jonathan Bell
 <jonathan@...pberrypi.com>, Stanimir Varbanov <svarbanov@...e.de>
Subject: Re: [PATCH 3/7] irqchip: Add Broadcom bcm2712 MSI-X interrupt
 controller

Stanimir!

On Wed, Jun 26 2024 at 13:45, Stanimir Varbanov wrote:
> Add an interrupt controller driver for MSI-X Interrupt Peripheral (MIP)
> hardware block found in bcm2712. The interrupt controller is used to
> handle MSI-X interrupts from peripherials behind PCIe endpoints like
> RP1 south bridge found in RPi5.
>
> There are two MIPs on bcm2712, the first has 64 consecutive SPIs
> assigned to 64 output vectors, and the second has 17 SPIs, but only
> 8 of them are consecutive starting at the 8th output vector.

This is going to conflict with:

  https://lore.kernel.org/all/20240623142137.448898081@linutronix.de/

  git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git devmsi-arm-v4-1

Can you please have a look and rework it to the new per device MSI
domain concept?

The series shows you how to convert it over. If you need help, please
let me know.

Thanks,

        tglx