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Message-ID: <CADrjBPqLT7e_eV9=ykDXG7_p3j8yJTbQNAc_dXVVRDP7Vqbtag@mail.gmail.com>
Date: Thu, 27 Jun 2024 13:10:26 +0100
From: Peter Griffin <peter.griffin@...aro.org>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, 
	alim.akhtar@...sung.com, s.nawrocki@...sung.com, cw00.choi@...sung.com, 
	mturquette@...libre.com, sboyd@...nel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org, 
	linux-kernel@...r.kernel.org, tudor.ambarus@...aro.org, 
	andre.draszik@...aro.org, kernel-team@...roid.com, willmcvicker@...gle.com, 
	devicetree@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH 0/3] Add syscon-reboot and syscon-poweroff support for
 gs101/Pixel 6

Hi Krzysztof,

On Thu, 27 Jun 2024 at 11:47, Krzysztof Kozlowski <krzk@...nel.org> wrote:
>
> On 26/06/2024 21:42, Peter Griffin wrote:
> > Hi Krzysztof,
> >
> > This series adds support for syscon-reboot and syscon-poweroff to gs101/Oriole.
> > It has been tested with reboot and poweroff commands respectively.
> >
> > Note the syscon-reboot/poweroff has *runtime* dependencies on the exynos-pmu
>
> How does the runtime dependency manifests? Something get broken if there
> are no dependencies? Or maybe reboot does not work, but probably it did
> not work before, either?

Without [1] but with this series applied you will get an Serror
interrupt and hang on poweroff, and reboot commands, as it will use a
mmio syscon to write the protected register.

[   74.680240][    T1] reboot: Restarting system
[   74.680322][    C0] SError Interrupt on CPU0, code
0x00000000be000011 -- SError
[   74.680329][    C0] CPU: 0 PID: 1 Comm: systemd-shutdow Not tainted
6.10.0-rc3-next-20240613-00009-g6ca503bd3c2b #476
[   74.680336][    C0] Hardware name: Oriole (DT)
[   74.680338][    C0] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT
-SSBS BTYPE=--)
[   74.680345][    C0] pc : _raw_spin_unlock_irqrestore+0x10/0x44
[   74.680363][    C0] lr : regmap_unlock_spinlock+0x14/0x20
[   74.680373][    C0] sp : ffff80008009bb40
[   74.680375][    C0] x29: ffff80008009bb40 x28: ffff00da4587e158
x27: ffffa38d3bc74708
[   74.680386][    C0] x26: ffffa38d3d9c9ca8 x25: 0000000000000000
x24: 0000000000000000
[   74.680394][    C0] x23: 0000000000000000 x22: 0000000000000002
x21: 0000000000000002
[   74.680400][    C0] x20: 0000000000003a00 x19: 0000000000000000
x18: ffffffffffffffff
[   74.680407][    C0] x17: 0000000000000000 x16: ffffa38d3c6cf438
x15: ffff80008009b6a0
[   74.680414][    C0] x14: 0000000000000000 x13: ffff00dbb6980000
x12: 00000000000007d4
[   74.680421][    C0] x11: 000000000000029c x10: ffff00dbb6c40000 x9
: ffff00dbb6980000
[   74.680427][    C0] x8 : ffff80008009bc28 x7 : 0000000000000000 x6
: 0000000000000000
[   74.680434][    C0] x5 : ffffa38d3b83e074 x4 : 0000000000003a00 x3
: 0000000000000000
[   74.680440][    C0] x2 : ffffa38d3b831764 x1 : ffff00da40230000 x0
: 0000000100000001
[   74.680447][    C0] Kernel panic - not syncing: Asynchronous SError Interrupt

and

[   49.448590][    T1] reboot: Power down
[   49.448747][    C0] SError Interrupt on CPU0, code
0x00000000be000011 -- SError
[..]

Without the clk-gs101 critical clock change, poweroff command will
hang, when shutting down UFS.

Without the exynos-pmu support for !atomic registers, the reboot
command won't work when the DT is present as the register write to
SYSTEM_CONFIGURATION register will fail.

[  114.525217][    T1] reboot: Restarting system
[  114.525290][    T1] tensor_sec_reg_write(): SMC failed: -22
[  115.525434][    T1] Unable to restart system
[  116.025576][    T1] Reboot failed -- System halted

For poweroff, you are correct this has not been supported on Pixel 6
so far upstream.

However `echo b > /proc/sysrq-trigger ` has worked in previous kernel
releases (it would reset the system using Watchdog). With the
syscon-reboot DT present, but without [1] this will cause a Serror and
no longer restart the system which would be a regression.

Thanks,

Peter.

[1] https://lore.kernel.org/linux-arm-kernel/20240621115544.1655458-1-peter.griffin@linaro.org/

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