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Message-ID: <87ed8gxc2u.ffs@tglx>
Date: Sat, 29 Jun 2024 12:44:41 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Marc Zyngier <maz@...nel.org>
Cc: Catalin Marinas <catalin.marinas@....com>, LKML
 <linux-kernel@...r.kernel.org>, linux-arm-kernel@...ts.infradead.org,
 linux-pci@...r.kernel.org, anna-maria@...utronix.de, shawnguo@...nel.org,
 s.hauer@...gutronix.de, festevam@...il.com, bhelgaas@...gle.com,
 rdunlap@...radead.org, vidyas@...dia.com, ilpo.jarvinen@...ux.intel.com,
 apatel@...tanamicro.com, kevin.tian@...el.com, nipun.gupta@....com,
 den@...inux.co.jp, andrew@...n.ch, gregory.clement@...tlin.com,
 sebastian.hesselbarth@...il.com, gregkh@...uxfoundation.org,
 rafael@...nel.org, alex.williamson@...hat.com, will@...nel.org,
 lorenzo.pieralisi@....com, jgg@...lanox.com, ammarfaizi2@...weeb.org,
 robin.murphy@....com, lpieralisi@...nel.org, nm@...com, kristo@...nel.org,
 vkoul@...nel.org, okaya@...nel.org, agross@...nel.org,
 andersson@...nel.org, mark.rutland@....com,
 shameerali.kolothum.thodi@...wei.com, yuzenghui@...wei.com,
 shivamurthy.shastri@...utronix.de
Subject: Re: [patch V4 05/21] irqchip/gic-v3-its: Provide MSI parent for
 PCI/MSI[-X]

Marc!

On Sat, Jun 29 2024 at 11:11, Marc Zyngier wrote:
>> I have the ugly feeling that the flag is applied at the wrong level,
>> or not propagated.

Indeed.

> Here's a possible fix. Making the masking at the ITS level optional is
> not an option (haha). It is the PCI masking that is totally
> superfluous and that could completely be elided.

It's the right fix because ITS requires this bit to be set.

Vs. PCI masking, you are right from a pure ITS point of view, but not
from the PCI side. PCI can't be unmsaked until there is a valid message
and we need to mask it on shutdown.

It's not a run time issue at all because PCI/MSI is edge triggered so
the mask/unmask dance only matters during startup, shutdown and message
update.

> With this hack, I can boot a GICv3+ITS guest as usual.

It's not a hack. It's the proper solution. Let me fold that back and
look at the other PCI conversions which probably have the same issue.

Thanks for digging into this. This help is truly welcome right now.

Thanks,

        tglx

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