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Message-ID: <87a5j3y1cj.ffs@tglx>
Date: Sat, 29 Jun 2024 21:51:08 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Marc Zyngier <maz@...nel.org>
Cc: Catalin Marinas <catalin.marinas@....com>, LKML
 <linux-kernel@...r.kernel.org>, linux-arm-kernel@...ts.infradead.org,
 linux-pci@...r.kernel.org, anna-maria@...utronix.de, shawnguo@...nel.org,
 s.hauer@...gutronix.de, festevam@...il.com, bhelgaas@...gle.com,
 rdunlap@...radead.org, vidyas@...dia.com, ilpo.jarvinen@...ux.intel.com,
 apatel@...tanamicro.com, kevin.tian@...el.com, nipun.gupta@....com,
 den@...inux.co.jp, andrew@...n.ch, gregory.clement@...tlin.com,
 sebastian.hesselbarth@...il.com, gregkh@...uxfoundation.org,
 rafael@...nel.org, alex.williamson@...hat.com, will@...nel.org,
 lorenzo.pieralisi@....com, jgg@...lanox.com, ammarfaizi2@...weeb.org,
 robin.murphy@....com, lpieralisi@...nel.org, nm@...com, kristo@...nel.org,
 vkoul@...nel.org, okaya@...nel.org, agross@...nel.org,
 andersson@...nel.org, mark.rutland@....com,
 shameerali.kolothum.thodi@...wei.com, yuzenghui@...wei.com,
 shivamurthy.shastri@...utronix.de, Rob Herring <robh@...nel.org>
Subject: Re: [patch V4 05/21] irqchip/gic-v3-its: Provide MSI parent for
 PCI/MSI[-X]

On Sat, Jun 29 2024 at 12:44, Thomas Gleixner wrote:
>> With this hack, I can boot a GICv3+ITS guest as usual.
>
> It's not a hack. It's the proper solution. Let me fold that back and
> look at the other PCI conversions which probably have the same issue.
>
> Thanks for digging into this. This help is truly welcome right now.

So while I pondered to do it slightly differently for a moment I went
back to this approach and fixed up the other affected ones too. Full
delta vs. devmsi-arm-v4-1 below.

Updated branch:

   git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git devmsi-arm-v4-2

Thanks,

	tglx
---
diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
index 428132aa26cc..51af63c046ed 100644
--- a/drivers/irqchip/irq-gic-v2m.c
+++ b/drivers/irqchip/irq-gic-v2m.c
@@ -243,13 +243,14 @@ static void __init gicv2m_teardown(void)
 	}
 }
 
-#define GICV2M_MSI_FLAGS_REQUIRED  (MSI_FLAG_USE_DEF_DOM_OPS |	\
-				    MSI_FLAG_USE_DEF_CHIP_OPS)
+
+#define GICV2M_MSI_FLAGS_REQUIRED  (MSI_FLAG_USE_DEF_DOM_OPS |		\
+				    MSI_FLAG_USE_DEF_CHIP_OPS |		\
+				    MSI_FLAG_PCI_MSI_MASK_PARENT)
 
 #define GICV2M_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK |	\
 				    MSI_FLAG_PCI_MSIX      |	\
-				    MSI_FLAG_MULTI_PCI_MSI |	\
-				    MSI_FLAG_PCI_MSI_MASK_PARENT)
+				    MSI_FLAG_MULTI_PCI_MSI)
 
 static struct msi_parent_ops gicv2m_msi_parent_ops = {
 	.supported_flags	= GICV2M_MSI_FLAGS_SUPPORTED,
diff --git a/drivers/irqchip/irq-gic-v3-its-msi-parent.c b/drivers/irqchip/irq-gic-v3-its-msi-parent.c
index 21daa452ffa6..780e1bc9df54 100644
--- a/drivers/irqchip/irq-gic-v3-its-msi-parent.c
+++ b/drivers/irqchip/irq-gic-v3-its-msi-parent.c
@@ -11,12 +11,12 @@
 #include "irq-msi-lib.h"
 
 #define ITS_MSI_FLAGS_REQUIRED  (MSI_FLAG_USE_DEF_DOM_OPS |	\
-				 MSI_FLAG_USE_DEF_CHIP_OPS)
+				 MSI_FLAG_USE_DEF_CHIP_OPS |	\
+				 MSI_FLAG_PCI_MSI_MASK_PARENT)
 
 #define ITS_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK |	\
 				 MSI_FLAG_PCI_MSIX      |	\
-				 MSI_FLAG_MULTI_PCI_MSI |	\
-				 MSI_FLAG_PCI_MSI_MASK_PARENT)
+				 MSI_FLAG_MULTI_PCI_MSI)
 
 #ifdef CONFIG_PCI_MSI
 static int its_pci_msi_vec_count(struct pci_dev *pdev, void *data)
diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-mbi.c
index 0aad9699be33..3fe870f8ee17 100644
--- a/drivers/irqchip/irq-gic-v3-mbi.c
+++ b/drivers/irqchip/irq-gic-v3-mbi.c
@@ -191,12 +191,12 @@ static bool mbi_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
 }
 
 #define MBI_MSI_FLAGS_REQUIRED  (MSI_FLAG_USE_DEF_DOM_OPS |	\
-				 MSI_FLAG_USE_DEF_CHIP_OPS)
+				 MSI_FLAG_USE_DEF_CHIP_OPS |	\
+				 MSI_FLAG_PCI_MSI_MASK_PARENT)
 
 #define MBI_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK |	\
 				 MSI_FLAG_PCI_MSIX      |	\
-				 MSI_FLAG_MULTI_PCI_MSI |	\
-				 MSI_FLAG_PCI_MSI_MASK_PARENT)
+				 MSI_FLAG_MULTI_PCI_MSI)
 
 static const struct msi_parent_ops gic_v3_mbi_msi_parent_ops = {
 	.supported_flags	= MBI_MSI_FLAGS_SUPPORTED,
diff --git a/drivers/irqchip/irq-msi-lib.c b/drivers/irqchip/irq-msi-lib.c
index 15f92ce4d1e8..e93917b98d7d 100644
--- a/drivers/irqchip/irq-msi-lib.c
+++ b/drivers/irqchip/irq-msi-lib.c
@@ -28,6 +28,7 @@ bool msi_lib_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
 			       struct msi_domain_info *info)
 {
 	const struct msi_parent_ops *pops = real_parent->msi_parent_ops;
+	u32 required_flags = pops->required_flags;
 
 	/*
 	 * MSI parent domain specific settings. For now there is only the
@@ -66,8 +67,10 @@ bool msi_lib_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
 
 		/* Core managed MSI descriptors */
 		info->flags = MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS | MSI_FLAG_FREE_MSI_DESCS;
-		break;
+		fallthrough;
 	case DOMAIN_BUS_WIRED_TO_MSI:
+		/* Remove PCI specific flags */
+		required_flags &= ~MSI_FLAG_PCI_MSI_MASK_PARENT;
 		break;
 	default:
 		/*
@@ -84,7 +87,7 @@ bool msi_lib_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
 	 */
 	info->flags			&= pops->supported_flags;
 	/* Enforce the required flags */
-	info->flags			|= pops->required_flags;
+	info->flags			|= required_flags;
 
 	/* Chip updates for all child bus types */
 	if (!info->chip->irq_eoi)

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