[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240701151231.29425-13-kyarlagadda@nvidia.com>
Date: Mon, 1 Jul 2024 20:42:30 +0530
From: Krishna Yarlagadda <kyarlagadda@...dia.com>
To: <linux-tegra@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-doc@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
<linux-mmc@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <thierry.reding@...il.com>, <jonathanh@...dia.com>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <corbet@....net>,
<andi.shyti@...nel.org>, <wsa+renesas@...g-engineering.com>,
<ulf.hansson@...aro.org>, <adrian.hunter@...el.com>, <digetx@...il.com>,
<ldewangan@...dia.com>, <kyarlagadda@...dia.com>, <mkumard@...dia.com>
Subject: [RFC PATCH V2 12/12] arm64: tegra: SDHCI timing settings
Set SDHCI timing registers through config settings for
Tegra234 chip and P3701 board.
Signed-off-by: Krishna Yarlagadda <kyarlagadda@...dia.com>
---
arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi | 36 ++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
index 7e5b9c10c617..30c125636123 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
@@ -426,6 +426,34 @@ i2c-standard-cfg {
};
+ configmmc1: config-mmc3400000 {
+
+ sdhci-mmc-hs200-cfg {
+ nvidia,num-tuning-iter = <0x2>;
+ };
+
+ sdhci-uhs-sdr104-cfg {
+ nvidia,num-tuning-iter = <0x2>;
+ };
+
+ sdhci-uhs-sdr50-cfg {
+ nvidia,num-tuning-iter = <0x4>;
+ };
+
+ };
+
+ configmmc2: config-mmc3460000 {
+
+ sdhci-mmc-hs200-cfg {
+ nvidia,num-tuning-iter = <0x2>;
+ };
+
+ sdhci-mmc-hs400-cfg {
+ nvidia,num-tuning-iter = <0x2>;
+ };
+
+ };
+
};
bus@0 {
@@ -461,5 +489,13 @@ i2c@...0000 {
config-settings = <&configi2c8>;
};
+ mmc@...0000 {
+ config-settings = <&configmmc1>;
+ };
+
+ mmc@...0000 {
+ config-settings = <&configmmc2>;
+ };
+
};
};
--
2.43.2
Powered by blists - more mailing lists