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Message-ID: <20240701151231.29425-11-kyarlagadda@nvidia.com>
Date: Mon, 1 Jul 2024 20:42:28 +0530
From: Krishna Yarlagadda <kyarlagadda@...dia.com>
To: <linux-tegra@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-doc@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
<linux-mmc@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <thierry.reding@...il.com>, <jonathanh@...dia.com>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <corbet@....net>,
<andi.shyti@...nel.org>, <wsa+renesas@...g-engineering.com>,
<ulf.hansson@...aro.org>, <adrian.hunter@...el.com>, <digetx@...il.com>,
<ldewangan@...dia.com>, <kyarlagadda@...dia.com>, <mkumard@...dia.com>
Subject: [RFC PATCH V2 10/12] dt-bindings: mmc: tegra-sdhci: reference to config
SDHCI vendor tuning registers are configured using config setting
framework. Add reference to SDHCI controllers config settings.
Signed-off-by: Krishna Yarlagadda <kyarlagadda@...dia.com>
---
.../devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml
index 72987f0326a1..39bda6ce1e50 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml
@@ -88,6 +88,10 @@ properties:
items:
- description: phandle to the core power domain
+ config-settings:
+ description: phandle to the sdhci configuration settings
+ $ref: /schemas/types.yaml#/definitions/phandle
+
nvidia,default-tap:
description: Specify the default inbound sampling clock trimmer value for
non-tunable modes.
--
2.43.2
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