linux-kernel - Re: [External] Re: [PATCH 1/1] iommu/riscv: Support sharing irq lines between iommu queues

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Message-ID: <CAPYmKFtCzQOOsN7vutoY0MrthtvcGxBqRsbr4ZgMQsaY1CrXHQ@mail.gmail.com>
Date: Mon, 1 Jul 2024 17:10:35 +0800
From: Xu Lu <luxu.kernel@...edance.com>
To: Tomasz Jeznach <tjeznach@...osinc.com>
Cc: joro@...tes.org, will@...nel.org, robin.murphy@....com, 
	paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu, 
	apatel@...tanamicro.com, sunilvl@...tanamicro.com, iommu@...ts.linux.dev, 
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	linux@...osinc.com, baolu.lu@...ux.intel.com, lihangjing@...edance.com, 
	xieyongji@...edance.com
Subject: Re: [External] Re: [PATCH 1/1] iommu/riscv: Support sharing irq lines
 between iommu queues

Sorry for not describing it clearly.

Indeed, the hardware interrupt lines have be configured in
riscv_iommu_init_check().

What I mean is that virtual interrupts of irqs[iommu->irqs_count] to
irqs[RISCV_IOMMU_INTR_COUNT - 1] are not set, which will cause
riscv_iommu_queue_enable() fail:
       const unsigned int irq =
iommu->irqs[riscv_iommu_queue_vec(iommu, queue->qid)];
       rc = request_threaded_irq(irq, xxx);
       if (rc) {
                 queue->iommu = NULL;
                 return rc;
       }

The virtual irq of queue id 'q' should be the same as irqs[q %
iommu->irqs_count] as ICVEC is configured in the same way.

Regards,

Xu Lu

On Mon, Jul 1, 2024 at 4:47 PM Tomasz Jeznach <tjeznach@...osinc.com> wrote:
>
> On Mon, Jul 1, 2024 at 9:29 AM 'Xu Lu' via linux <linux@...osinc.com> wrote:
> >
> > When the number of wired interrupt lines is less than the number of
> > iommu queues, we should assign one irq line for several queues and
> > configure csr icvec accordingly.
> >
>
> Is this case not already covered by the code in function
> riscv_iommu_init_check(), assigning cause to vector register (ICVEC)
> based on available interrupt vectors? Interrupt vector selection is
> based on accepted ICVEC configuration (see riscv_iommu_queue_vec()).
>
> Relevant code (patch 'Command and fault queue support'):
> iommu->icvec = FIELD_PREP(RISCV_IOMMU_ICVEC_FIV, 1 % iommu->irqs_count) |
>        FIELD_PREP(RISCV_IOMMU_ICVEC_PIV, 2 % iommu->irqs_count) |
>        FIELD_PREP(RISCV_IOMMU_ICVEC_PMIV, 3 % iommu->irqs_count);
>
> Values in iommu->irqs[] should represent actual interrupts allocated
> for the device.
>
> Best,
> - Tomasz
>
> > Signed-off-by: Xu Lu <luxu.kernel@...edance.com>
> > ---
> >  drivers/iommu/riscv/iommu-platform.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/iommu/riscv/iommu-platform.c b/drivers/iommu/riscv/iommu-platform.c
> > index da336863f152..1d0af1260d5b 100644
> > --- a/drivers/iommu/riscv/iommu-platform.c
> > +++ b/drivers/iommu/riscv/iommu-platform.c
> > @@ -60,6 +60,10 @@ static int riscv_iommu_platform_probe(struct platform_device *pdev)
> >         for (vec = 0; vec < iommu->irqs_count; vec++)
> >                 iommu->irqs[vec] = platform_get_irq(pdev, vec);
> >
> > +       for (vec = iommu->irqs_count; vec < RISCV_IOMMU_INTR_COUNT; vec++)
> > +               iommu->irqs[vec] = platform_get_irq(pdev,
> > +                                                   (vec % iommu->irqs_count));
> > +
> >         /* Enable wire-signaled interrupts, fctl.WSI */
> >         if (!(iommu->fctl & RISCV_IOMMU_FCTL_WSI)) {
> >                 iommu->fctl |= RISCV_IOMMU_FCTL_WSI;
> > --
> > 2.20.1
> >
> > --
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