lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID:
 <SHXPR01MB086332671CEBE2D0A21ED695E6D32@SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn>
Date: Mon, 1 Jul 2024 10:45:15 +0000
From: Minda Chen <minda.chen@...rfivetech.com>
To: Conor Dooley <conor@...nel.org>, "linux-riscv@...ts.infradead.org"
	<linux-riscv@...ts.infradead.org>
CC: Conor Dooley <conor.dooley@...rochip.com>, Rob Herring
	<robh+dt@...nel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] riscv: dts: starfive: add pcie1 on the star64



> 
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> It was reported to me that the star64 actually /does/ have an exposed PCIe port,
> despite the commit message there. In my original conversation with Minda,
> they said that pcie1 was available there and pcie0 was not, but the v2 patch
> didn't actually add pcie1 on the star64.
> 
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> I think I'll just squash this in and fixup the commit message, since the patch is still
> at the top of my branch.
> 
> CC: Minda Chen <minda.chen@...rfivetech.com>
> CC: Conor Dooley <conor@...nel.org>
> CC: Rob Herring <robh+dt@...nel.org>,
> CC: Emil Renner Berthing <emil.renner.berthing@...onical.com
> CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org
> CC: devicetree@...r.kernel.org
> CC: linux-kernel@...r.kernel.org
> CC: linux-riscv@...ts.infradead.org
> ---
>  arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> index 2d41f18e0359..b720cdd15ed6 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> @@ -39,6 +39,10 @@ phy1: ethernet-phy@1 {
>  	};
>  };
> 
> +&pcie1 {
> +	status = "okay";
> +};
> +
>  &phy0 {
>  	rx-internal-delay-ps = <1900>;
>  	tx-internal-delay-ps = <1500>;
> --
> 2.43.0

Hi Conor

The jh7110-pine64-star64.dts is in linux-next tree. I have not noticed it before.
Should I squash this to my patch? Can my dts patch be accepted in kernel 6.11? Thanks
(The same with Starfive PCIe patch set in linux-next, which will be merge in 6.11, right?)


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ