linux-kernel - Re: [PATCH net-next v3 06/10] dt-bindings: net: Add Synopsys DW xPCS bindings

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Message-ID: <a2quritc5udbpebvymbbhez2e4g5qk774trpzvsmtzgd4bpc4y@ckaqnqyrkszx>
Date: Mon, 1 Jul 2024 04:40:24 +0300
From: Serge Semin <fancer.lancer@...il.com>
To: Rob Herring <robh@...nel.org>
Cc: Conor Dooley <conor@...nel.org>, Andrew Lunn <andrew@...n.ch>, 
	Heiner Kallweit <hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>, 
	Alexandre Torgue <alexandre.torgue@...s.st.com>, Jose Abreu <joabreu@...opsys.com>, 
	Jose Abreu <Jose.Abreu@...opsys.com>, Vladimir Oltean <olteanv@...il.com>, 
	Florian Fainelli <f.fainelli@...il.com>, Maxime Chevallier <maxime.chevallier@...tlin.com>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, 
	"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, 
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Sagar Cheluvegowda <quic_scheluve@...cinc.com>, 
	Abhishek Chauhan <quic_abchauha@...cinc.com>, Andrew Halaney <ahalaney@...hat.com>, 
	Jiawen Wu <jiawenwu@...stnetic.com>, Mengyuan Lou <mengyuanlou@...-swift.com>, 
	Tomer Maimon <tmaimon77@...il.com>, openbmc@...ts.ozlabs.org, netdev@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next v3 06/10] dt-bindings: net: Add Synopsys DW xPCS
 bindings

On Fri, Jun 28, 2024 at 04:12:46PM -0600, Rob Herring wrote:
> On Thu, Jun 27, 2024 at 08:10:48PM +0300, Serge Semin wrote:
> > On Thu, Jun 27, 2024 at 04:51:22PM +0100, Conor Dooley wrote:
> > > On Thu, Jun 27, 2024 at 03:41:26AM +0300, Serge Semin wrote:
> > > > +  clocks:
> > > > +    description:
> > > > +      Both MCI and APB3 interfaces are supposed to be equipped with a clock
> > > > +      source connected via the clk_csr_i line.
> > > > +
> > > > +      PCS/PMA layer can be clocked by an internal reference clock source
> > > > +      (phyN_core_refclk) or by an externally connected (phyN_pad_refclk) clock
> > > > +      generator. Both clocks can be supplied at a time.
> > > > +    minItems: 1
> > > > +    maxItems: 3
> > > > +
> > > > +  clock-names:
> > > > +    oneOf:
> > > > +      - minItems: 1
> > > > +        items:
> > > > +          - enum: [core, pad]
> > > > +          - const: pad
> > > > +      - minItems: 1
> > > > +        items:
> > > > +          - const: pclk
> > > > +          - enum: [core, pad]
> > > > +          - const: pad
> > > 
> > 
> > > While reading this, I'm kinda struggling to map "clk_csr_i" to a clock
> > > name. Is that pclk? And why pclk if it is connected to "clk_csr_i"?
> > 
> > Right. It's "pclk". The reason of using the "pclk" name is that it has
> > turned to be a de-facto standard name in the DT-bindings for the
> > peripheral bus clock sources utilized for the CSR-space IO buses.
> > Moreover the STMMAC driver responsible for the parental DW *MAC
> > devices handling also has the "pclk" name utilized for the clk_csr_i
> > signal. So using the "pclk" name in the tightly coupled devices (MAC
> > and PCS) for the same signal seemed a good idea.
> 

> It is? That's really just the name of the bus clock for APB (Arm 
> Peripheral Bus). If there's a name that matches the docs, use that. 
> Though I'd drop 'clk_' part.

Yes, it's normally should have been utilized for APB, but as I see it
the name utilization has gone wider than to just the ARM Peripheral
bus clock. The DW MAC clock-names DT-property bindings is just one
example of that.

Anyway. Ok. I'll convert the name to "csr". (I'll drop the _i suffix
too since it's obvious that the clock signal is the connected to the
device input pin.)

-Serge(y)

> 
> Rob