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Message-ID: <ZoW8kYwp2GeM64oy@a4bf019067fa.jf.intel.com>
Date: Wed, 3 Jul 2024 14:03:13 -0700
From: Ashok Raj <ashok.raj@...el.com>
To: Dave Hansen <dave.hansen@...el.com>
CC: "Chang S. Bae" <chang.seok.bae@...el.com>, <linux-kernel@...r.kernel.org>,
	<x86@...nel.org>, <tglx@...utronix.de>, <mingo@...hat.com>, <bp@...en8.de>,
	<dave.hansen@...ux.intel.com>, <tony.luck@...el.com>, Yan Hua Wu
	<yanhua1.wu@...el.com>, William Xie <william.xie@...el.com>, Ashok Raj
	<ashok.raj@...el.com>
Subject: Re: [PATCH 1/1] arch/x86/microcode/intel: Remove unnecessary cache
 writeback and invalidation

On Wed, Jul 03, 2024 at 01:55:19PM -0700, Dave Hansen wrote:
> On 7/3/24 13:50, Ashok Raj wrote:
> > Agree that we must get wider testing. Only caveat is that you should find a
> > newer microcode to apply, which might be difficult for all products. Unless
> > there is a debug option to reload force the same rev in case you don't have
> > a newer ucode to test. Its good to get this in to reduce the big hammer
> > effect.
> 
> Why is it hard to find a newer microcode to apply?  Just because the
> BIOS-provided one is more likely to be the last update the other the CPU?

Yes, sometimes that, or an earlier update has already been applied via
early loading (which seems most of the case). Someone needs to do some
extra work to remove it from initramfs copy, reboot and redo the test.

Some manual assemply required. It would have been nice to just avoid
doing early loading, but that cmdline (dis_ucode_ldr) disables both early
and late-loading. I had some patches a while back to separate the two to 
help with this, but I never got a chance to send that out. 

dis_ucode_ldr: Disables both early and late-loading.

-- 
Cheers,
Ashok

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