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Message-ID: <bd0b19e8-ff72-4a6b-9f7f-400ddafddacd@intel.com>
Date: Wed, 3 Jul 2024 14:11:34 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Ashok Raj <ashok.raj@...el.com>
Cc: "Chang S. Bae" <chang.seok.bae@...el.com>, linux-kernel@...r.kernel.org,
 x86@...nel.org, tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
 dave.hansen@...ux.intel.com, tony.luck@...el.com,
 Yan Hua Wu <yanhua1.wu@...el.com>, William Xie <william.xie@...el.com>
Subject: Re: [PATCH 1/1] arch/x86/microcode/intel: Remove unnecessary cache
 writeback and invalidation

On 7/3/24 14:03, Ashok Raj wrote:
> On Wed, Jul 03, 2024 at 01:55:19PM -0700, Dave Hansen wrote:
>> On 7/3/24 13:50, Ashok Raj wrote:
>>> Agree that we must get wider testing. Only caveat is that you should find a
>>> newer microcode to apply, which might be difficult for all products. Unless
>>> there is a debug option to reload force the same rev in case you don't have
>>> a newer ucode to test. Its good to get this in to reduce the big hammer
>>> effect.
>>
>> Why is it hard to find a newer microcode to apply?  Just because the
>> BIOS-provided one is more likely to be the last update the other the CPU?
> 
> Yes, sometimes that, or an earlier update has already been applied via
> early loading (which seems most of the case). Someone needs to do some
> extra work to remove it from initramfs copy, reboot and redo the test.

This patch touches __apply_microcode(), which looks like it's used in
both early and late loading.

But it sounds like you're thinking that the WBINVD is (or was) primarily
useful during late loading.  Why is that?

Or am I totally misreading the code again? :)

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