linux-kernel - Re: [PATCH 01/10] MIPS: smp: Make IPI interrupts scalable

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Message-ID: <alpine.DEB.2.21.2407032204331.38148@angie.orcam.me.uk>
Date: Wed, 3 Jul 2024 22:26:21 +0100 (BST)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
cc: Thomas Bogendoerfer <tsbogend@...ha.franken.de>, 
    Florian Fainelli <florian.fainelli@...adcom.com>, 
    Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>, 
    Huacai Chen <chenhuacai@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, 
    Serge Semin <fancer.lancer@...il.com>, 
    "paulburton@...nel.org" <paulburton@...nel.org>, 
    "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>, 
    linux-kernel@...r.kernel.org
Subject: Re: [PATCH 01/10] MIPS: smp: Make IPI interrupts scalable

On Thu, 4 Jul 2024, Jiaxun Yang wrote:

> It has been tested on MIPS Boston I6500, malta SOC-It, Loongson-2K,

 SOC-it (or SOC-it 101 to be precise) is the name of a bus controller:

System controller/revision =    MIPS SOC-it 101 OCP / 1.3   SDR-FW-4:1

used across numerous platforms from the M4K core onwards, UP, MT, or MP.  
I think it would make sense if you revealed the processor type instead.

> I don't really know broadcom platforms and SGI platforms well so
> changes to those platforms are kept minimal (no functional change).

 Technically I could run it on my SB1250, but I'm too overloaded now to 
commit to any timescale.  Sorry.

  Maciej