linux-kernel - Re: [PATCH 1/1] arch/x86/microcode/intel: Remove unnecessary cache writeback and invalidation

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Message-ID: <cb646736-1ebb-4273-b90e-734a318b59ca@intel.com>
Date: Wed, 3 Jul 2024 17:05:53 -0700
From: "Chang S. Bae" <chang.seok.bae@...el.com>
To: Ashok Raj <ashok.raj@...el.com>, Dave Hansen <dave.hansen@...el.com>
CC: <linux-kernel@...r.kernel.org>, <x86@...nel.org>, <tglx@...utronix.de>,
	<mingo@...hat.com>, <bp@...en8.de>, <dave.hansen@...ux.intel.com>,
	<tony.luck@...el.com>, Yan Hua Wu <yanhua1.wu@...el.com>, William Xie
	<william.xie@...el.com>
Subject: Re: [PATCH 1/1] arch/x86/microcode/intel: Remove unnecessary cache
 writeback and invalidation

On 7/3/2024 2:33 PM, Ashok Raj wrote:
> 
> When wbinvd() was introduced I do believe we added to both early and late.
> Although I don't recall entirely.

Yes, it was added for both:

$ git show --source 91df9fdf5149
...
diff --git a/arch/x86/kernel/cpu/microcode/intel.c 
b/arch/x86/kernel/cpu/microcode/intel.c
index 87bd6dc94081..e2864bc2d575 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -600,6 +600,12 @@ static int apply_microcode_early(struct 
ucode_cpu_info *uci, bool early)
                 return UCODE_OK;
         }

+       /*
+        * Writeback and invalidate caches before updating microcode to 
avoid
+        * internal issues depending on what the microcode is updating.
+        */
+       native_wbinvd();
+
         /* write microcode via MSR 0x79 */
         native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);

@@ -816,6 +822,12 @@ static enum ucode_state apply_microcode_intel(int cpu)
                 return UCODE_OK;
         }

+       /*
+        * Writeback and invalidate caches before updating microcode to 
avoid
+        * internal issues depending on what the microcode is updating.
+        */
+       native_wbinvd();
+
         /* write microcode via MSR 0x79 */
         wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);

Thanks,
Chang