linux-kernel - Re: [PATCH 1/1] arch/x86/microcode/intel: Remove unnecessary cache writeback and invalidation

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Message-ID: <dc3c2ba3-73db-4609-bc34-3181c44d0dd0@intel.com>
Date: Tue, 10 Sep 2024 11:35:35 -0700
From: "Chang S. Bae" <chang.seok.bae@...el.com>
To: <linux-kernel@...r.kernel.org>
CC: <x86@...nel.org>, <tglx@...utronix.de>, <mingo@...hat.com>,
	<bp@...en8.de>, <dave.hansen@...ux.intel.com>, <tony.luck@...el.com>,
	<ashok.raj@...el.com>, Yan Hua Wu <yanhua1.wu@...el.com>
Subject: Re: [PATCH 1/1] arch/x86/microcode/intel: Remove unnecessary cache
 writeback and invalidation

On 7/1/2024 2:20 PM, Chang S. Bae wrote:
> 
> Additionally, the side effects of doing this have been overlooked. It
> extends the CPU rendezvous time for late loading. The cache flush takes
> about 1x to 3.5x more time than needed for updating the microcode.

To provide more context, the latency impact was found to be more adverse 
when late loading was staged using the new loading feature [1]. Its 
enabling patch set will be posted once the specification is updated, 
likely after the upcoming merge window. I will include this fix (v2) as 
part of the series.

Thanks,
Chang

[1]: https://cdrdv2.intel.com/v1/dl/getContent/782715