linux-kernel - Re: [PATCH v2 09/12] PCI: brcmstb: Refactor for chips with many regular inbound BARs

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Message-ID: <bd097824-17a7-407f-ba92-6c4ef2c0029f@suse.de>
Date: Thu, 4 Jul 2024 23:11:55 +0300
From: Stanimir Varbanov <svarbanov@...e.de>
To: Stanimir Varbanov <svarbanov@...e.de>,
 Jim Quinlan <james.quinlan@...adcom.com>, linux-pci@...r.kernel.org,
 Nicolas Saenz Julienne <nsaenz@...nel.org>,
 Bjorn Helgaas <bhelgaas@...gle.com>,
 Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
 Cyril Brulebois <kibi@...ian.org>, bcm-kernel-feedback-list@...adcom.com,
 jim2101024@...il.com
Cc: Florian Fainelli <florian.fainelli@...adcom.com>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof Wilczyński <kw@...ux.com>,
 Rob Herring <robh@...nel.org>,
 "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
 <linux-rpi-kernel@...ts.infradead.org>,
 "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
 <linux-arm-kernel@...ts.infradead.org>,
 open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 09/12] PCI: brcmstb: Refactor for chips with many
 regular inbound BARs

Hi,

On 7/4/24 16:30, Stanimir Varbanov wrote:
> Hi Jim,
> 
> On 7/3/24 21:02, Jim Quinlan wrote:
>> Previously, our chips provided three inbound "BARS" with fixed purposes:
>> the first was for mapping SOC registers, the second was for memory, and the
>> third was for memory but with the endian swapped.  We typically only used
>> one of these BARs.
>>
>> Complicating that BARs usage was the fact that the PCIe HW would do a
>> baroque internal mapping of system memory, and concatenate the regions of
>> multiple memory controllers.
>>
>> Newer chips such as the 7712 and Cable Modem SOCs have taken a step forward
>> and now provide multiple inbound BARs.  This works in concert with the
>> dma-ranges property, where each provided range becomes an inbound BAR.
>>
>> This commit provides support for these new chips and their multiple
>> inbound BARs but also keeps the legacy support for the older system.
>>
>> Signed-off-by: Jim Quinlan <james.quinlan@...adcom.com>
>> ---
>>  drivers/pci/controller/pcie-brcmstb.c | 199 +++++++++++++++++++-------
>>  1 file changed, 150 insertions(+), 49 deletions(-)

<cut>

>>  static int brcm_pcie_setup(struct brcm_pcie *pcie)
>>  {
>> -	u64 rc_bar2_offset, rc_bar2_size;
>> +	struct rc_bar rc_bars[PCIE_BRCM_MAX_RC_BARS];
>>  	void __iomem *base = pcie->base;
>>  	struct pci_host_bridge *bridge;
>>  	struct resource_entry *entry;
>>  	u32 tmp, burst, aspm_support;
>> -	int num_out_wins = 0;
>> -	int ret, memc;
>> +	int num_out_wins = 0, num_rc_bars = 0;
>> +	int i, memc;
>>  
>>  	/* Reset the bridge */
>>  	pcie->bridge_sw_init_set(pcie, 1);
>> @@ -933,17 +1016,47 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
>>  	u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_PCIE_RCB_64B_MODE_MASK);
>>  	writel(tmp, base + PCIE_MISC_MISC_CTRL);
>>  
>> -	ret = brcm_pcie_get_rc_bar2_size_and_offset(pcie, &rc_bar2_size,
>> -						    &rc_bar2_offset);
>> -	if (ret)
>> -		return ret;
>> +	num_rc_bars = brcm_pcie_get_rc_bar_sizes_and_offsets(pcie, rc_bars);
> 
> Can we change the function name to brcm_pcie_get_inbound_regions? ...

... or better brcm_pcie_get_inbound_wins() ?

~Stan