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Message-ID: <20240705152721.GA9485@willie-the-truck>
Date: Fri, 5 Jul 2024 16:27:21 +0100
From: Will Deacon <will@...nel.org>
To: Nicolin Chen <nicolinc@...dia.com>
Cc: robin.murphy@....com, joro@...tes.org, jgg@...dia.com,
thierry.reding@...il.com, vdumpa@...dia.com, jonathanh@...dia.com,
linux-kernel@...r.kernel.org, iommu@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-tegra@...r.kernel.org
Subject: Re: [PATCH v9 4/6] iommu/arm-smmu-v3: Add CS_NONE quirk for
CONFIG_TEGRA241_CMDQV
On Tue, Jul 02, 2024 at 01:10:19PM -0700, Nicolin Chen wrote:
> On Tue, Jul 02, 2024 at 12:47:14PM -0700, Nicolin Chen wrote:
> > @@ -345,6 +345,11 @@ static void arm_smmu_cmdq_build_sync_cmd(u64 *cmd, struct arm_smmu_device *smmu,
> > FIELD_PREP(CMDQ_SYNC_0_MSH, ARM_SMMU_SH_ISH) |
> > FIELD_PREP(CMDQ_SYNC_0_MSIATTR, ARM_SMMU_MEMATTR_OIWB);
> >
> > + if (cmdq->type == TEGRA241_VCMDQ) {
> > + cmd[0] |= FIELD_PREP(CMDQ_SYNC_0_CS, CMDQ_SYNC_0_CS_NONE);
> > + return;
> > + }
> > +
> > if (!(smmu->options & ARM_SMMU_OPT_MSIPOLL)) {
> > cmd[0] |= FIELD_PREP(CMDQ_SYNC_0_CS, CMDQ_SYNC_0_CS_SEV);
> > return;
> > @@ -690,7 +695,8 @@ static int arm_smmu_cmdq_poll_until_sync(struct arm_smmu_device *smmu,
> > struct arm_smmu_cmdq *cmdq,
> > struct arm_smmu_ll_queue *llq)
> > {
> > - if (smmu->options & ARM_SMMU_OPT_MSIPOLL)
> > + if (smmu->options & ARM_SMMU_OPT_MSIPOLL &&
> > + cmdq->type != TEGRA241_VCMDQ) {
> > return __arm_smmu_cmdq_poll_until_msi(smmu, cmdq, llq);
> >
> > --------------------------------------------------------------
> >
> > Would you prefer this one? I feel CMDQ_QUIRK_SYNC_CS_NONE_ONLY
> > is more general looking though..
>
> And we would need some additional lines of comments for the two
> pieces above, explaining why TEGRA241_VCMDQ type needs the first
> one while bypasses the second one. Again, it feels even worse :(
I hacked the code around a bit this afternoon. Please can you see if:
https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=for-nicolin/grace-vcmdq-wip
does roughly what you need?
Will
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