linux-kernel - [PATCH 0/3] address S32G2/S32G3 SoC based boards particularities

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Message-ID: <20240708121018.246476-1-ciprianmarian.costea@oss.nxp.com>
Date: Mon,  8 Jul 2024 15:10:15 +0300
From: Ciprian Costea <ciprianmarian.costea@....nxp.com>
To: Haibo Chen <haibo.chen@....com>,
	Adrian Hunter <adrian.hunter@...el.com>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>
Cc: linux-kernel@...r.kernel.org,
	linux-mmc@...r.kernel.org,
	imx@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org,
	s32@....com,
	Ciprian Costea <ciprianmarian.costea@....nxp.com>
Subject: [PATCH 0/3] address S32G2/S32G3 SoC based boards particularities

This patchset addresses S32G2/S32G3 SoC based boards
uSDHC controller particularities such as:
- GPIO card detect wake mechanism is not available

It also fixes a clocking usage issue on 'clk_get_rate',
in case of 'per' clock.

Changes in v2:
 - Dropped option to not change pinctrl during PM.
Instead, when S32G2/S32G3 uSDHC pinctrl entries will be
upstream'ed, 'sleep' pinctrl will not be defined.

Ciprian Costea (3):
  mmc: sdhci-esdhc-imx: disable card detect wake for S32G based
    platforms
  mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement
  MAINTAINERS: add 's32@....com' as relevant mailing list for
    'sdhci-esdhc-imx' driver

 MAINTAINERS                        |  1 +
 drivers/mmc/host/sdhci-esdhc-imx.c | 16 +++++++++++++---
 2 files changed, 14 insertions(+), 3 deletions(-)

-- 
2.45.2