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Message-ID: <87zfqpus3h.ffs@tglx>
Date: Wed, 10 Jul 2024 18:30:58 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Tianyang Zhang <zhangtianyang@...ngson.cn>, corbet@....net,
 alexs@...nel.org, siyanteng@...ngson.cn, chenhuacai@...nel.org,
 kernel@...0n.name, jiaxun.yang@...goat.com, gaoliang@...ngson.cn,
 wangliupu@...ngson.cn, lvjianmin@...ngson.cn, zhangtianyang@...ngson.cn,
 yijun@...ngson.cn, mhocko@...e.com, akpm@...ux-foundation.org,
 dianders@...omium.org, maobibo@...ngson.cn, xry111@...111.site,
 zhaotianrui@...ngson.cn, nathan@...nel.org, yangtiezhu@...ngson.cn,
 zhoubinbin@...ngson.cn
Cc: loongarch@...ts.linux.dev, linux-doc@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH V4][RESEND] LoongArch: Add AVEC irqchip support

On Wed, Jul 10 2024 at 12:38, Tianyang Zhang wrote:
> Introduce the advanced extended interrupt controllers. This feature will
> allow each core to have 256 independent interrupt vectors and MSI
> interrupts can be independently routed to any vector on any CPU.

Why are you resending V4 if there have been review comments on the
original V4 submission?

Thanks,

        tglx

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