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Message-ID: <245cd3c4-fdcd-768a-1c7c-e7abd1086864@loongson.cn>
Date: Thu, 11 Jul 2024 09:40:17 +0800
From: Tianyang Zhang <zhangtianyang@...ngson.cn>
To: Thomas Gleixner <tglx@...utronix.de>, corbet@....net, alexs@...nel.org,
 siyanteng@...ngson.cn, chenhuacai@...nel.org, kernel@...0n.name,
 jiaxun.yang@...goat.com, gaoliang@...ngson.cn, wangliupu@...ngson.cn,
 lvjianmin@...ngson.cn, yijun@...ngson.cn, mhocko@...e.com,
 akpm@...ux-foundation.org, dianders@...omium.org, maobibo@...ngson.cn,
 xry111@...111.site, zhaotianrui@...ngson.cn, nathan@...nel.org,
 yangtiezhu@...ngson.cn, zhoubinbin@...ngson.cn
Cc: loongarch@...ts.linux.dev, linux-doc@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH V4][RESEND] LoongArch: Add AVEC irqchip support

Hi, Thomas

在 2024/7/11 上午12:30, Thomas Gleixner 写道:
> On Wed, Jul 10 2024 at 12:38, Tianyang Zhang wrote:
>> Introduce the advanced extended interrupt controllers. This feature will
>> allow each core to have 256 independent interrupt vectors and MSI
>> interrupts can be independently routed to any vector on any CPU.
> Why are you resending V4 if there have been review comments on the
> original V4 submission?
>
> Thanks,
>
>          tglx

Due to the patch I submitted at the time introducing a fixed code for 
testing,

I was eager to fix this issue and hope that subsequent reviews will be 
based

on this correct version.

I have reviewed the kernel submission documentation and found that the

usage of RESEND is inappropriate. The next time there is a modification

issue, I will update the version and resubmit it


Thanks

TIanyang



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