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Message-Id: <20240710133029.676677-1-amadeus@jmu.edu.cn>
Date: Wed, 10 Jul 2024 21:30:29 +0800
From: Chukun Pan <amadeus@....edu.cn>
To: heiko@...ech.de
Cc: amadeus@....edu.cn,
conor+dt@...nel.org,
devicetree@...r.kernel.org,
krzk+dt@...nel.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
robh@...nel.org
Subject: Re: [PATCH v2 7/9] arm64: dts: rockchip: use generic Ethernet PHY reset bindings for Lunzn Fastrhino R68S
> what's the reason behind the changed timings?
>
> The original comment stated,
> /* Reset time is 15ms, 50ms for rtl8211f */
> so that timing change needs an explanation please :-)
I don't know why this comment says that, but it's clearly wrong.
According to the PHY datasheet, the RTL8211F PHY needs a 10ms
assert delay and at least 72ms deassert delay. Considering the
possibility of mixed use of PHY chips, the reset time should be
further increased.
Thanks,
Chukun
--
2.25.1
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