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Message-ID:
<MA0P287MB2822C3005C40EAF50BD6D9C8FEB72@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM>
Date: Mon, 29 Jul 2024 09:45:42 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Inochi Amaoto <inochiama@...look.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Guo Ren <guoren@...nel.org>, Xiaoguang Xing <xiaoguang.xing@...hgo.com>
Cc: devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] riscv: dts: sophgo: Add i2c device support for sg2042
On 2024/7/26 9:07, Inochi Amaoto wrote:
> The i2c ip of sg2042 is a standard Synopsys i2c ip, which is already
> supported by the mainline kernel.
>
> Add i2c device node for sg2042.
>
> Signed-off-by: Inochi Amaoto <inochiama@...look.com>
> ---
> arch/riscv/boot/dts/sophgo/sg2042.dtsi | 54 +++++++++++++++++++++++++-
> 1 file changed, 53 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> index 34c802bd3f9b..eebd6817520e 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> @@ -44,8 +44,61 @@ soc: soc {
> compatible = "simple-bus";
> #address-cells = <2>;
> #size-cells = <2>;
> + interrupt-parent = <&intc>;
I would suggest this change (use common interrupt-parent for soc) in
another separated patch and this would looks more clear.
Then this patch is only for i2c related changes.
> ranges;
>
> + i2c0: i2c@...0005000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x70 0x30005000 0x0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_APB_I2C>;
> + clock-names = "ref";
> + clock-frequency = <100000>;
> + interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_I2C0>;
> + status = "disabled";
> + };
> +
> + i2c1: i2c@...0006000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x70 0x30006000 0x0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_APB_I2C>;
> + clock-names = "ref";
> + clock-frequency = <100000>;
> + interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_I2C1>;
> + status = "disabled";
> + };
> +
> + i2c2: i2c@...0007000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x70 0x30007000 0x0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_APB_I2C>;
> + clock-names = "ref";
> + clock-frequency = <100000>;
> + interrupts = <103 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_I2C2>;
> + status = "disabled";
> + };
> +
> + i2c3: i2c@...0008000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x70 0x30008000 0x0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_APB_I2C>;
> + clock-names = "ref";
> + clock-frequency = <100000>;
> + interrupts = <104 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_I2C3>;
> + status = "disabled";
> + };
> +
> pllclk: clock-controller@...00100c0 {
> compatible = "sophgo,sg2042-pll";
> reg = <0x70 0x300100c0 0x0 0x40>;
> @@ -388,7 +441,6 @@ rstgen: reset-controller@...0013000 {
> uart0: serial@...0000000 {
> compatible = "snps,dw-apb-uart";
> reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
> - interrupt-parent = <&intc>;
I would prefer this change in a separated patch which has been mentioned
upon.
> interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <500000000>;
> clocks = <&clkgen GATE_CLK_UART_500M>,
> --
> 2.45.2
>
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