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Message-ID: <20240731184550.34411-2-danila@jiaxyga.com>
Date: Wed, 31 Jul 2024 21:45:49 +0300
From: Danila Tikhonov <danila@...xyga.com>
To: andersson@...nel.org,
konradybcio@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
robdclark@...il.com,
sean@...rly.run,
quic_abhinavk@...cinc.com,
dmitry.baryshkov@...aro.org,
marijn.suijten@...ainline.org,
airlied@...il.com,
daniel@...ll.ch,
fekz115@...il.com
Cc: linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org,
cros-qcom-dts-watchers@...omium.org,
linux@...nlining.org,
Danila Tikhonov <danila@...xyga.com>,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH v2 1/2] drm/msm/a6xx: Add A642L speedbin (0x81)
From: Eugene Lepshy <fekz115@...il.com>
According to downstream, A642L's speedbin is 129 and uses 4 as index
Signed-off-by: Eugene Lepshy <fekz115@...il.com>
Signed-off-by: Danila Tikhonov <danila@...xyga.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
index 68ba9aed5506..99f0ee1a2ede 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
@@ -869,6 +869,7 @@ static const struct adreno_info a6xx_gpus[] = {
.speedbins = ADRENO_SPEEDBINS(
{ 0, 0 },
{ 117, 0 },
+ { 129, 4 },
{ 172, 2 }, /* Called speedbin 1 downstream, but let's not break things! */
{ 190, 1 },
),
--
2.45.2
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