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Message-ID: <bc443719-a23c-4262-9bc1-9b622c3fb0eb@kernel.org>
Date: Fri, 2 Aug 2024 09:18:23 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jim Quinlan <james.quinlan@...adcom.com>, linux-pci@...r.kernel.org,
Nicolas Saenz Julienne <nsaenz@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Cyril Brulebois <kibi@...ian.org>, Stanimir Varbanov <svarbanov@...e.de>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
bcm-kernel-feedback-list@...adcom.com, jim2101024@...il.com
Cc: Florian Fainelli <florian.fainelli@...adcom.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
"moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@...ts.infradead.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 02/12] dt-bindings: PCI: brcmstb: Add 7712 SoC
description
On 01/08/2024 00:28, Jim Quinlan wrote:
> Add description for the 7712 SoC, a Broadcom STB sibling chip of the RPi 5.
> The 7712 uses three reset controllers: rescal, for phy reset calibration;
> bridge, for the bridge between the PCIe bus and the memory bus; and swinit,
> which is a "soft" initialization of the PCIe HW.
>
> Signed-off-by: Jim Quinlan <james.quinlan@...adcom.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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